ADUC834BSZ Analog Devices Inc, ADUC834BSZ Datasheet - Page 79

• Manufacturer Part Number: ADUC834BSZ
• Description: IC ADC DUAL16/24BIT W/MCU 52MQFP
• Manufacturer: Analog Devices Inc
• Series: MicroConverter® ADuC8xxr

Specifications of ADUC834BSZ

• Core Size: 8-Bit
• Program Memory Size: 62KB (62K x 8)
• Oscillator Type: Internal
• Core Processor: 8052
• Speed: 12.58MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: POR, PSM, PWM, Temp Sensor, WDT
• Number Of I /o: 34
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 2.25K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.25 V
• Data Converters: A/D 3x16b, 4x24b; D/A 1x12b
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 52-MQFP, 52-PQFP
• Controller Family/series: (8052) ADUC
• No. Of I/o's: 26
• Eeprom Memory Size: 62KB
• Ram Memory Size: 2KB
• Cpu Speed: 12.58MHz
• Package: 52MQFP
• Device Core: 8052
• Family Name: ADuC8xx
• Maximum Speed: 12.58 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 26
• Interface Type: I2C/SPI/UART
• On-chip Adc: 4-chx16-bit|4-chx24-bit
• On-chip Dac: 1-chx12-bit
• Number Of Timers: 3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Parameter
I
*Input filtering on both the SCLOCK and SDATA inputs surpresses noise spikes less than 50 ns.
REV. A
2
C-SERIAL INTERFACE TIMING
t
t
t
t
t
t
t
t
t
t
t
L
H
SHD
DSU
DHD
RSU
PSU
BUF
R
F
SUP*
SDATA (I/O)
SCLK (I)
SCLOCK Low Pulsewidth
SCLOCK High Pulsewidth
Start Condition Hold Time
Data Setup Time
Data Hold Time
Setup Time for Repeated Start
Stop Condition Setup Time
Bus Free Time between a STOP
Condition and a START Condition
Rise Time of Both SCLOCK and SDATA
Fall Time of Both SCLOCK and SDATA
Pulsewidth of Spike Suppressed
t
PSU
CONDITION
STOP
PS
t
BUF
CONDITION
START
t
DSU
t
SHD
Figure 79. I
MSB
1
t
DHD
2
C Compatible Interface Timing
2-7
–79–
t
L
LSB
8
4.7
4.0
0.6
0.6
0.6
1.3
Min
100
t
SUP
t
H
t
DSU
t
SUP
ACK
9
Max
0.9
300
300
50
t
RSU
t
DHD
REPEATED
START
S(R)
Unit
µs
µs
µs
ns
µs
µs
µs
µs
ns
ns
ns
t
F
MSB
t
F
1
t
R
t
R
ADuC834
Figure
79
79
79
79
79
79
79
79
79
79
79