ADUC834BSZ Analog Devices Inc, ADUC834BSZ Datasheet - Page 71

• Manufacturer Part Number: ADUC834BSZ
• Description: IC ADC DUAL16/24BIT W/MCU 52MQFP
• Manufacturer: Analog Devices Inc
• Series: MicroConverter® ADuC8xxr

Specifications of ADUC834BSZ

• Core Size: 8-Bit
• Program Memory Size: 62KB (62K x 8)
• Oscillator Type: Internal
• Core Processor: 8052
• Speed: 12.58MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: POR, PSM, PWM, Temp Sensor, WDT
• Number Of I /o: 34
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 2.25K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.25 V
• Data Converters: A/D 3x16b, 4x24b; D/A 1x12b
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 52-MQFP, 52-PQFP
• Controller Family/series: (8052) ADUC
• No. Of I/o's: 26
• Eeprom Memory Size: 62KB
• Ram Memory Size: 2KB
• Cpu Speed: 12.58MHz
• Package: 52MQFP
• Device Core: 8052
• Family Name: ADuC8xx
• Maximum Speed: 12.58 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 26
• Interface Type: I2C/SPI/UART
• On-chip Adc: 4-chx16-bit|4-chx24-bit
• On-chip Dac: 1-chx12-bit
• Number Of Timers: 3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Parameter
EXTERNAL PROGRAM MEMORY
REV. A
t
t
t
t
t
t
t
t
t
t
t
t
LHLL
AVLL
LLAX
LLIV
LLPL
PLPH
PLIV
PXIX
PXIZ
AVIV
PLAZ
PHAX
ALE Pulsewidth
Address Valid to ALE Low
Address Hold after ALE Low
ALE Low to Valid Instruction In
ALE Low to PSEN Low
PSEN Pulsewidth
PSEN Low to Valid Instruction In
Input Instruction Hold after PSEN
Input Instruction Float after PSEN
Address to Valid Instruction In
PSEN Low to Address Float
Address Hold after PSEN High
PORT 0 (I/O)
CORE_CLK
PORT 2 (O)
PSEN (O)
ALE (O)
Figure 71. External Program Memory Read Cycle
t
LHLL
t
AVLL
(OUT)
PCL
12.58 MHz Core_Clk
Min
119
39
49
49
193
0
0
t
t
LLPL
LLAX
t
AVIV
–71–
t
PLAZ
PCH
54
Max
218
133
292
25
t
PLPH
t
t
PLIV
LLIV
INSTRUCTION
Min
2t
t
t
t
3t
0
0
CORE
CORE
CORE
(IN)
t
PXIX
CORE
CORE
Variable Core_Clk
– 40
– 30
– 30
– 40
– 45
t
PXIZ
t
PHAX
Max
4t
3t
t
5t
25
CORE
CORE
CORE
CORE
– 25
– 100
– 105
– 105
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ADuC834
Figure
71
71
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