LPC2470FBD208,551 NXP Semiconductors, LPC2470FBD208,551 Datasheet - Page 489
![IC ARM7 MCU LCD 208-LQFP](/photos/12/13/121391/208-lqfp_sot459-1_pkg_sml.jpg)
LPC2470FBD208,551
Manufacturer Part Number
LPC2470FBD208,551
Description
IC ARM7 MCU LCD 208-LQFP
Manufacturer
NXP Semiconductors
Series
LPC2400r
Datasheets
1.OM11077.pdf
(792 pages)
2.LPC2470FET208551.pdf
(89 pages)
3.LPC2470FET208551.pdf
(91 pages)
Specifications of LPC2470FBD208,551
Package / Case
208-LQFP
Core Processor
ARM7
Core Size
16/32-Bit
Speed
72MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, LCD, POR, PWM, WDT
Number Of I /o
160
Program Memory Type
ROMless
Ram Size
98K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
LPC24
Core
ARM7TDMI-S
Data Bus Width
16 bit, 32 bit
Data Ram Size
98 KB
Interface Type
CAN/I2C/I2S/SPI/SSP/UART/USB
Maximum Clock Frequency
72 MHz
Number Of Programmable I/os
160
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, MCB2470U
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
On-chip Dac
1-ch x 10-bit
Package
208LQFP
Device Core
ARM7TDMI-S
Family Name
LPC2000
Maximum Speed
72 MHz
Operating Supply Voltage
3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4361-5
935284068551
LPC2470FBD208-S
935284068551
LPC2470FBD208-S
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LPC2470FBD208,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
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NXP Semiconductors
Table 427. Status Register (CAN1SR - address 0xE004 401C, CAN2SR - address 0xE004 801C) bit description
[1]
[2]
UM10237_4
User manual
Bit
22
23
31:24 -
If the CPU tries to write to this Transmit Buffer when the Transmit Buffer Status bit is '0' (locked), the written byte is not accepted and is
lost without this being signalled.
The Transmission Complete Status bit is set '0' (incomplete) whenever the Transmission Request bit or the Self Reception Request bit
is set '1' for this TX buffer. The Transmission Complete Status bit remains '0' until a message is transmitted successfully.
Symbol Value
ES
BS
8.9 Receive Frame Status Register (CAN1RFS - 0xE004 4020, CAN2RFS -
0xE004 8020)
This register defines the characteristics of the current received message. It is read-only in
normal operation but can be written for testing purposes if the RM bit in CANxMOD is 1.
Table 428. Receive Frame Status register (CAN1RFS - address 0xE004 4020, CAN2RFS -
Bit
9:0
10
15:11 -
19:16 DLC
29:20 -
30
31
Symbol Function
ID Index If the BP bit (below) is 0, this value is the zero-based number of the
BP
RTR
FF
Function
Error Status. This bit is identical to the ES bit in the CANxGSR.
Bus Status. This bit is identical to the BS bit in the CANxGSR.
Reserved, user software should not write ones to reserved bits. The value
read from a reserved bit is not defined.
address 0xE004 8020) bit description
Lookup Table RAM entry at which the Acceptance Filter matched
the received Identifier. Disabled entries in the Standard tables are
included in this numbering, but will not be matched. See
18–18 “Examples of acceptance filter tables and ID index values”
on page 518
If this bit is 1, the current message was received in AF Bypass
mode, and the ID Index field (above) is meaningless.
Reserved, user software should not write ones to reserved bits. The
value read from a reserved bit is not defined.
The field contains the Data Length Code (DLC) field of the current
received message. When RTR = 0, this is related to the number of
data bytes available in the CANRDA and CANRDB registers as
follows:
0000-0111 = 0 to 7 bytes1000-1111 = 8 bytes
With RTR = 1, this value indicates the number of data bytes
requested to be sent back, with the same encoding.
Reserved, user software should not write ones to reserved bits. The
value read from a reserved bit is not defined.
This bit contains the Remote Transmission Request bit of the
current received message. 0 indicates a Data Frame, in which (if
DLC is non-zero) data can be read from the CANRDA and possibly
the CANRDB registers. 1 indicates a Remote frame, in which case
the DLC value identifies the number of data bytes requested to be
sent using the same Identifier.
A 0 in this bit indicates that the current received message included
an 11 bit Identifier, while a 1 indicates a 29 bit Identifier. This affects
the contents of the CANid register described below.
Rev. 04 — 26 August 2009
for examples of ID Index values.
Chapter 18: LPC24XX CAN controllers CAN1/2
Section
UM10237
© NXP B.V. 2009. All rights reserved.
Reset
Value
0
0
NA
Reset
Value
0
0
NA
0
NA
0
0
489 of 792
RM
Set
0
0
RM
Set
X
X
X
X
X
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