LPC2470FBD208,551 NXP Semiconductors, LPC2470FBD208,551 Datasheet - Page 443
![IC ARM7 MCU LCD 208-LQFP](/photos/12/13/121391/208-lqfp_sot459-1_pkg_sml.jpg)
LPC2470FBD208,551
Manufacturer Part Number
LPC2470FBD208,551
Description
IC ARM7 MCU LCD 208-LQFP
Manufacturer
NXP Semiconductors
Series
LPC2400r
Datasheets
1.OM11077.pdf
(792 pages)
2.LPC2470FET208551.pdf
(89 pages)
3.LPC2470FET208551.pdf
(91 pages)
Specifications of LPC2470FBD208,551
Package / Case
208-LQFP
Core Processor
ARM7
Core Size
16/32-Bit
Speed
72MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, LCD, POR, PWM, WDT
Number Of I /o
160
Program Memory Type
ROMless
Ram Size
98K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
LPC24
Core
ARM7TDMI-S
Data Bus Width
16 bit, 32 bit
Data Ram Size
98 KB
Interface Type
CAN/I2C/I2S/SPI/SSP/UART/USB
Maximum Clock Frequency
72 MHz
Number Of Programmable I/os
160
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, MCB2470U
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
On-chip Dac
1-ch x 10-bit
Package
208LQFP
Device Core
ARM7TDMI-S
Family Name
LPC2000
Maximum Speed
72 MHz
Operating Supply Voltage
3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4361-5
935284068551
LPC2470FBD208-S
935284068551
LPC2470FBD208-S
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LPC2470FBD208,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
- Current page: 443 of 792
- Download datasheet (5Mb)
1. Basic configuration
2. Features
UM10237_4
User manual
The UART1 peripheral is configured using the following registers:
1. Power: In the PCONP register
2. Peripheral clock: In the PCLK_SEL0 register
3. Baud rate: In register U1LCR
4. UART FIFO: Use bit FIFO enable (bit 0) in register U0FCR
5. Pins: Select UART pins and pin modes in registers PINSELn and PINMODEn (see
6. Interrupts: To enable UART interrupts set bit DLAB =0 in register U1LCR
•
•
•
•
•
•
•
UM10237
Chapter 17: LPC24XX UART1
Rev. 04 — 26 August 2009
Remark: On reset, UART1 is enabled (PCUART1 = 1).
to registers DLL
Also, if needed, set the fractional baud rate in the fractional divider register
(Table
FIFO.
Section
Remark: UART receive pins should not have pull-down resistors enabled.
(Table
in the VIC using the VICIntEnable register
UART1 is identical to UART0/2/3, with the addition of a modem interface.
16 byte Receive and Transmit FIFOs.
Register locations conform to ‘550 industry standard.
Receiver FIFO trigger points at 1, 4, 8, and 14 bytes.
Built-in baud rate generator.
Standard modem interface signals included (CTS, DCD, DTS, DTR, RI, RTS).
LPC2400 UART1 allows for implementation of either software or hardware flow
control.
17–412).
17–405). This enables access to U1IER
9–5).
(Table
Rev. 04 — 26 August 2009
17–399) and DLM
(Table
(Table
17–405), set bit DLAB =1. This enables access
4–63), set bits PCUART1.
(Table
(Table
(Table
(Table
17–400) for setting the baud rate.
7–106).
4–56), select PCLK_UART1.
17–401). Interrupts are enabled
(Table
17–404) to enable
© NXP B.V. 2009. All rights reserved.
User manual
443 of 792
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