P89LPC922FDH,512 NXP Semiconductors, P89LPC922FDH,512 Datasheet - Page 32

• Manufacturer Part Number: P89LPC922FDH,512
• Description: IC 80C51 MCU FLASH 8K 20-TSSOP
• Manufacturer: NXP Semiconductors
• Series: LPC900r

Specifications of P89LPC922FDH,512

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 18MHz
• Connectivity: I²C, UART/USART
• Peripherals: Brown-out Detect/Reset, LED, POR, PWM, WDT
• Number Of I /o: 18
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-TSSOP
• Processor Series: P89LPC9x
• Core: 80C51
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: I2C, UART
• Maximum Clock Frequency: 18 MHz
• Number Of Programmable I/os: 18
• Number Of Timers: 2
• Operating Supply Voltage: 2.4 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: - 40 C
• For Use With: 622-1014 - BOARD FOR LPC9XX TSSOP622-1010 - BOARD FOR LPC922 TSSOP622-1008 - BOARD FOR LPC9103 10-HVSON622-1006 - SOCKET ADAPTER BOARDEPM900K - EMULATOR/PROGRAMMER NXP P89LPC9568-4000 - DEMO BOARD SPI/I2C TO DUAL UART568-3510 - DEMO BOARD SPI/I2C TO UART622-1002 - USB IN-CIRCUIT PROG LPC9XX568-1759 - EMULATOR DEBUGGER/PROGRMMR LPC9X
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-2452; 935273788512; P89LPC922FDH

Philips Semiconductors
9397 750 14469
Product data
8.24.1 General description
8.24.2 Features
8.24.3 ISP and IAP capabilities of the P89LPC920/921/922/9221
8.24 Flash program memory
The P89LPC920/921/922/9221 Flash memory provides in-circuit electrical erasure
and programming. The Flash can be read, erased, or written as bytes. The Sector
and Page Erase functions can erase any Flash sector (1 kB) or page (64 bytes). The
Chip Erase operation will erase the entire program memory. In-System Programming
and standard parallel programming are both available. On-chip erase and write timing
generation contribute to a user-friendly programming interface. The
P89LPC920/921/922/9221 Flash reliably stores memory contents even after
10,000 erase and program cycles. The cell is designed to optimize the erase and
programming mechanisms. The P89LPC920/921/922/9221 uses V
voltage to perform the Program/Erase algorithms.
Flash organization:
two/four/eight 1 kB sectors. Each sector can be further divided into 64-byte pages. In
addition to sector erase, page erase, and byte erase, a 64-byte page register is
included which allows from 1 to 64 bytes of a given page to be programmed at the
same time, substantially reducing overall programming time. An In-Application
Programming (IAP) interface is provided to allow the end user’s application to erase
and reprogram the user code memory. In addition, erasing and reprogramming of
user-programmable bytes including UCFG1, the Boot Status Bit and the Boot Vector
are supported. As shipped from the factory, the upper 512 bytes of user code space
contains a serial In-System Programming (ISP) routine allowing for the device to be
programmed in circuit through the serial port.
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Parallel programming with industry-standard commercial programmers.
In-Circuit serial Programming (ICP) with industry-standard commercial
programmers.
IAP-Lite allows individual and multiple bytes of code memory to be used for data
storage and programmed under control of the end application.
Internal fixed boot ROM, containing low-level In-Application Programming (IAP)
routines that can be called from the end application (in addition to IAP-Lite).
Default serial loader providing In-System Programming (ISP) via the serial port,
located in upper end of user program memory.
Boot vector allows user-provided Flash loader code to reside anywhere in the
Flash memory space, providing flexibility to the user.
Programming and erase over the full operating voltage range.
Read/Programming/Erase using ISP/IAP/IAP-Lite.
Any flash program or erase operation in 2 ms.
Programmable security for the code in the Flash for each sector.
>100,000 typical erase/program cycles for each byte.
10 year minimum data retention.
Rev. 08 — 15 December 2004
The P89LPC920/921/922/9221 program memory consists of
P89LPC920/921/922/9221
8-bit microcontrollers with two-clock 80C51 core
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
DD
as the supply
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