P89LPC922FDH,512 NXP Semiconductors, P89LPC922FDH,512 Datasheet - Page 15

• Manufacturer Part Number: P89LPC922FDH,512
• Description: IC 80C51 MCU FLASH 8K 20-TSSOP
• Manufacturer: NXP Semiconductors
• Series: LPC900r

Specifications of P89LPC922FDH,512

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 18MHz
• Connectivity: I²C, UART/USART
• Peripherals: Brown-out Detect/Reset, LED, POR, PWM, WDT
• Number Of I /o: 18
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-TSSOP
• Processor Series: P89LPC9x
• Core: 80C51
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: I2C, UART
• Maximum Clock Frequency: 18 MHz
• Number Of Programmable I/os: 18
• Number Of Timers: 2
• Operating Supply Voltage: 2.4 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: - 40 C
• For Use With: 622-1014 - BOARD FOR LPC9XX TSSOP622-1010 - BOARD FOR LPC922 TSSOP622-1008 - BOARD FOR LPC9103 10-HVSON622-1006 - SOCKET ADAPTER BOARDEPM900K - EMULATOR/PROGRAMMER NXP P89LPC9568-4000 - DEMO BOARD SPI/I2C TO DUAL UART568-3510 - DEMO BOARD SPI/I2C TO UART622-1002 - USB IN-CIRCUIT PROG LPC9XX568-1759 - EMULATOR DEBUGGER/PROGRMMR LPC9X
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-2452; 935273788512; P89LPC922FDH

Philips Semiconductors
9397 750 14469
Product data
8.2.6 Clock output
8.3 On-chip RC oscillator option
8.4 Watchdog oscillator option
8.5 External clock input option
the minimum specified operating voltage. When using an oscillator frequency
above 12 MHz, in some applications, an external brownout detect circuit may
be required to hold the device in reset when V
specified operating voltage.
The P89LPC920/921/922/9221 supports a user-selectable clock output function on
the XTAL2/CLKOUT pin when crystal oscillator is not being used. This condition
occurs if another clock source has been selected (on-chip RC oscillator, watchdog
oscillator, external clock input on X1) and if the Real-Time clock is not using the
crystal oscillator as its clock source. This allows external devices to synchronize to
the P89LPC920/921/922/9221. This output is enabled by the ENCLK bit in the TRIM
register. The frequency of this clock output is
is not needed in Idle mode, it may be turned off prior to entering Idle, saving
additional power.
The P89LPC920/921/922/9221 has a 6-bit TRIM register that can be used to tune the
frequency of the RC oscillator. During reset, the TRIM value is initialized to a factory
pre-programmed value to adjust the oscillator frequency to 7.373 MHz, 1% at room
temperature. End-user applications can write to the Trim register to adjust the on-chip
RC oscillator to other frequencies.
The watchdog has a separate oscillator which has a frequency of 400 kHz. This
oscillator can be used to save power when a high clock frequency is not needed.
In this configuration, the processor clock is derived from an external source driving
the XTAL1/P3.1 pin. The rate may be from 0 Hz up to 12 MHz. The XTAL2/P3.0 pin
may be used as a standard port pin or a clock output. When using an oscillator
frequency above 12 MHz, the reset input function of P1.5 must be enabled. An
external circuit is required to hold the device in reset at power-up until V
reached its specified level. When system power is removed V
the minimum specified operating voltage. When using an oscillator frequency
above 12 MHz, in some applications, an external brownout detect circuit may
be required to hold the device in reset when V
specified operating voltage.
Rev. 08 — 15 December 2004
P89LPC920/921/922/9221
8-bit microcontrollers with two-clock 80C51 core
1
2
that of the CCLK. If the clock output
DD
DD
falls below the minimum
falls below the minimum
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
DD
will fall below
DD
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has