P89LPC922FDH,512 NXP Semiconductors, P89LPC922FDH,512 Datasheet - Page 25

• Manufacturer Part Number: P89LPC922FDH,512
• Description: IC 80C51 MCU FLASH 8K 20-TSSOP
• Manufacturer: NXP Semiconductors
• Series: LPC900r

Specifications of P89LPC922FDH,512

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 18MHz
• Connectivity: I²C, UART/USART
• Peripherals: Brown-out Detect/Reset, LED, POR, PWM, WDT
• Number Of I /o: 18
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-TSSOP
• Processor Series: P89LPC9x
• Core: 80C51
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: I2C, UART
• Maximum Clock Frequency: 18 MHz
• Number Of Programmable I/os: 18
• Number Of Timers: 2
• Operating Supply Voltage: 2.4 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: - 40 C
• For Use With: 622-1014 - BOARD FOR LPC9XX TSSOP622-1010 - BOARD FOR LPC922 TSSOP622-1008 - BOARD FOR LPC9103 10-HVSON622-1006 - SOCKET ADAPTER BOARDEPM900K - EMULATOR/PROGRAMMER NXP P89LPC9568-4000 - DEMO BOARD SPI/I2C TO DUAL UART568-3510 - DEMO BOARD SPI/I2C TO UART622-1002 - USB IN-CIRCUIT PROG LPC9XX568-1759 - EMULATOR DEBUGGER/PROGRMMR LPC9X
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-2452; 935273788512; P89LPC922FDH

Philips Semiconductors
9397 750 14469
Product data
8.18.2 Mode 1
8.18.3 Mode 2
8.18.4 Mode 3
8.18.5 Baud rate generator and selection
8.18.6 Framing error
10 bits are transmitted (through TxD) or received (through RxD): a start bit
(logical ‘0’), 8 data bits (LSB first), and a stop bit (logical ‘1’). When data is received,
the stop bit is stored in RB8 in Special Function Register SCON. The baud rate is
variable and is determined by the Timer 1 overflow rate or the Baud Rate Generator
(described in
11 bits are transmitted (through TxD) or received (through RxD): start bit (logical ‘0’),
8 data bits (LSB first), a programmable 9
data is transmitted, the 9
‘1’. Or, for example, the parity bit (P, in the PSW) could be moved into TB8. When
data is received, the 9
while the stop bit is not saved. The baud rate is programmable to either
the CPU clock frequency, as determined by the SMOD1 bit in PCON.
11 bits are transmitted (through TxD) or received (through RxD): a start bit
(logical ‘0’), 8 data bits (LSB first), a programmable 9
(logical ‘1’). In fact, Mode 3 is the same as Mode 2 in all respects except baud rate.
The baud rate in Mode 3 is variable and is determined by the Timer 1 overflow rate or
the Baud Rate Generator (described in
selection”).
The P89LPC920/921/922/9221 enhanced UART has an independent Baud Rate
Generator. The baud rate is determined by a baud-rate preprogrammed into the
BRGR1 and BRGR0 SFRs which together form a 16-bit baud rate divisor value that
works in a similar manner as Timer 1 but is much more accurate. If the baud rate
generator is used, Timer 1 can be used for other timing functions.
The UART can use either Timer 1 or the baud rate generator output (see
Note that Timer T1 is further divided by 2 if the SMOD1 bit (PCON.7) is set. The
independent Baud Rate Generator uses OSCCLK.
Framing error is reported in the status register (SSTAT). In addition, if SMOD0
(PCON.6) is ‘1’, framing errors can be made available in SCON.7 respectively. If
SMOD0 is ‘0’, SCON.7 is SM0. It is recommended that SM0 and SM1 (SCON.7:6)
are set up when SMOD0 is ‘0’.
Fig 7. Baud rate sources for UART (Modes 1, 3).
Baud Rate Generator
Timer 1 Overflow
(CCLK-based)
(PCLK-based)
Section 8.18.5 “Baud rate generator and
Rev. 08 — 15 December 2004
th
data bit goes into RB8 in Special Function Register SCON,
th
data bit (TB8 in SCON) can be assigned the value of ‘0’ or
¸
2
P89LPC920/921/922/9221
8-bit microcontrollers with two-clock 80C51 core
SMOD1 = 1
SMOD1 = 0
Section 8.18.5 “Baud rate generator and
th
data bit, and a stop bit (logical ‘1’). When
SBRGS = 0
SBRGS = 1
th
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
selection”).
data bit, and a stop bit
Baud Rate Modes 1 and 3
1
002aaa419
16
Figure
or
1
25 of 46
32
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