AT89C5132-ROTUL Atmel, AT89C5132-ROTUL Datasheet - Page 123

IC 8051 MCU FLASH 64K USB 80TQFP

AT89C5132-ROTUL

Manufacturer Part Number
AT89C5132-ROTUL
Description
IC 8051 MCU FLASH 64K USB 80TQFP
Manufacturer
Atmel
Series
AT89C513xr
Datasheets

Specifications of AT89C5132-ROTUL

Core Processor
C52X2
Core Size
8-Bit
Speed
20MHz
Connectivity
IDE/ATAPI, I²C, MMC, PCM, SPI, UART/USART, USB
Peripherals
I²S, POR, WDT
Number Of I /o
44
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
2.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.3 V
Data Converters
A/D 2x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TQFP, 80-VQFP
Cpu Family
89C
Device Core
8051
Device Core Size
8b
Frequency (max)
40MHz
Interface Type
IDE/SPI/UART/USB
Total Internal Ram Size
2.25KB
# I/os (max)
44
Number Of Timers - General Purpose
2
Operating Supply Voltage (typ)
3V
Operating Supply Voltage (max)
3.3V
Operating Supply Voltage (min)
2.7V
On-chip Adc
2-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
80
Package Type
TQFP
Package
80TQFP
Family Name
89C
Maximum Speed
40 MHz
Operating Supply Voltage
3 V
Data Bus Width
8 Bit
Number Of Programmable I/os
44
Number Of Timers
2
Maximum Clock Frequency
20 MHz
Data Ram Size
2304 B
Mounting Style
SMD/SMT
A/d Bit Size
10 bit
A/d Channels Available
2
Height
1.45 mm
Length
14.1 mm
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Supply Voltage (max)
3.3 V
Supply Voltage (min)
2.7 V
Width
14.1 mm
For Use With
AT89OCD-01 - USB EMULATOR FOR AT8XC51 MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT89C5132-ROTUL
Manufacturer:
Atmel
Quantity:
10 000
Figure 19-5. Data Transmission Format (CPHA = 0)
Figure 19-6. Data Transmission Format (CPHA = 1)
19.1.5
4173E–USB–09/07
SS Management
MOSI (from Master)
MOSI (from Master)
SCK Cycle Number
SCK Cycle Number
MISO (from Slave)
MISO (from Slave)
to Capture Point
SCK (CPOL = 0)
SCK (CPOL = 1)
SCK (CPOL = 0)
SCK (CPOL = 1)
SPEN (Internal)
SPEN (Internal)
Capture Point
SS (to Slave)
SS (to Slave)
AT89C5132 captures data from the SI line while the selected slave captures data from the SO
line.
For simplicity, the following figures depict the SPI waveforms in idealized form and do not pro-
vide precise timing information. For timing parameters refer to the Section “AC Characteristics”.
Note:
Figure 19-5 shows an SPI transmission with CPHA = 0, where the first SCK edge is the MSB
capture point. Therefore the slave starts to output its MSB as soon as it is selected: SS asserted
to low level. SS must then be deasserted between each byte transmission (see Figure 19-7).
SPDAT must be loaded with data before SS is asserted again.
1. When the peripheral is disabled (SPEN = 0), default SCK line is high level.
MSB
MSB
MSB
MSB
1
1
bit 6
bit 6
bit 6
bit 6
2
2
bit 5
bit 5
bit 5
bit 5
3
3
bit 4
bit 4
bit 4
bit 4
4
4
bit 3
bit 3
bit 3
bit 3
5
5
bit 2
bit 2
bit 2
bit 2
6
6
bit 1
bit 1
bit 1
bit 1
7
7
LSB
LSB
LSB
8
8
LSB
AT89C5132
123

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