DSPIC30F6012A-30I/PF Microchip Technology, DSPIC30F6012A-30I/PF Datasheet - Page 61

• Manufacturer Part Number: DSPIC30F6012A-30I/PF
• Description: IC DSPIC MCU/DSP 144K 64TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F6012A-30I/PF

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 30 MIPs
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: AC'97, Brown-out Detect/Reset, I²S, LVD, POR, PWM, WDT
• Number Of I /o: 52
• Program Memory Size: 144KB (48K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• Core Frequency: 40MHz
• Core Supply Voltage: 5.5V
• Embedded Interface Type: CAN, I2C, SPI, UART
• No. Of I/o's: 52
• Flash Memory Size: 144KB
• Supply Voltage Range: 2.5V To 5.5V
• Package: 64TQFP
• Device Core: dsPIC
• Family Name: dsPIC30
• Maximum Speed: 30 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 52
• Interface Type: CAN/I2C/SPI/UART
• On-chip Adc: 16-chx12-bit
• Number Of Timers: 5
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT64PT4 - SOCKET TRAN ICE 64MQFP/TQFPAC164313 - MODULE SKT FOR PM3 64PFAC30F002 - MODULE SOCKET DSPIC30F 64TQFPDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

TABLE 7-1:
TABLE 7-2:
TABLE 7-3:
TABLE 7-4:
TRISA
PORTA
LATA
Legend:
Note
TRISB
PORTB
LATB
Legend:
Note
TRISC
PORTC
LATC
Legend:
Note
TRISC
PORTC
LATC
Legend:
Note
Name
Name
Name
Name
SFR
SFR
SFR
SFR
(2)
1:
2:
1:
1:
1:
Addr.
02C6 TRISB15 TRISB14 TRISB13 TRISB12 TRISB11 TRISB10
02C8
02CB
Addr.
02C0 TRISA15 TRISA14 TRISA13 TRISA12
02C2
02C4
Addr.
02CC
02CE
02D0
Addr.
02CC
02CE
02D0
Refer to “dsPIC30F Family Reference Manual” (DS70046) for descriptions of register bit fields.
PORTA is not implemented in the dsPIC30F6011A/6012A devices.
Refer to “dsPIC30F Family Reference Manual” (DS70046) for descriptions of register bit fields.
Refer to “dsPIC30F Family Reference Manual” (DS70046) for descriptions of register bit fields.
Refer to “dsPIC30F Family Reference Manual” (DS70046) for descriptions of register bit fields.
— = unimplemented bit, read as ‘0’
— = unimplemented bit, read as ‘0’
— = unimplemented bit, read as ‘0’
— = unimplemented bit, read as ‘0’
LATB15
Bit 15
LATA15
RB15
Bit 15
RA15
PORTA REGISTER MAP FOR dsPIC30F6013A/6014A
PORTB REGISTER MAP FOR dsPIC30F6011A/6012A/6013A/6014A
PORTC REGISTER MAP FOR dsPIC30F6011A/6012A
PORTC REGISTER MAP FOR dsPIC30F6013A/6014A
TRISC15 TRISC14 TRISC13
TRISC15 TRISC14 TRISC13
LATC15
LATC15
Bit 15
Bit 15
RC15
RC15
LATB14
Bit 14
LATA14
RB14
Bit 14
RA14
LATC14
LATC14
Bit 14
RC14
Bit 14
RC14
LATB13
Bit 13
LATA13
RB13
Bit 13
RA13
LATC13
LATC13
Bit 13
Bit 13
RC13
RC13
LATB12
Bit 12
RB12
LATA12
Bit 12
RA12
Bit 12
Bit 12
—
—
—
—
—
—
LATB11
Bit 11
RB11
Bit 11
Bit 11
Bit 11
—
—
—
—
—
—
—
—
—
LATB10
Bit 10
TRISA10 TRISA9
RB10
LATA10
Bit 10
Bit 10
Bit 10
RA10
—
—
—
—
—
—
TRISB9
Bit 9
Bit 9
LATB9
—
—
—
—
—
—
LATA9
Bit 9
RB9
Bit 9
RA9
Bit 8
Bit 8
—
—
—
—
—
—
TRISB8 TRISB7 TRISB6 TRISB5 TRISB4 TRISB3 TRISB2 TRISB1 TRISB0 1111 1111 1111 1111
LATB8
Bit 8
Bit 8
RB8
—
—
—
Bit 7
Bit 7
(1)
(1)
TRISA7 TRISA6
(1)
—
—
—
—
—
—
LATA7
Bit 7
RA7
LATB7
Bit 7
RB7
Bit 6
Bit 6
—
—
—
—
—
—
LATA6
Bit 6
RA6
LATB6
Bit 6
RB6
Bit 5
Bit 5
—
—
—
—
—
—
(1)
Bit 5
LATB5
—
—
—
Bit 5
RB5
TRISC4
LATC4
Bit 4
Bit 4
RC4
—
—
—
Bit 4
LATB4
—
—
—
Bit 4
RB4
TRISC3
LATC3
Bit 3
Bit 3
RC3
—
—
—
Bit 3
LATB3
Bit 3
RB3
—
—
—
TRISC2
TRISC2
LATC2
LATC2
Bit 2
Bit 2
RC2
RC2
LATB2
Bit 2
Bit 2
RB2
—
—
—
TRISC1
TRISC1
LATC1
LATC1
Bit 1
Bit 1
RC1
RC1
LATB1
Bit 1
RB1
Bit 1
—
—
—
Bit 0
Bit 0
LATB0
—
—
—
—
—
—
Bit 0
RB0
Bit 0
—
—
—
1110 0000 0000 0110
0000 0000 0000 0000
0000 0000 0000 0000
1110 0000 0001 1110
0000 0000 0000 0000
0000 0000 0000 0000
1111 0110 1100 0000
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
Reset State
Reset State
Reset State
Reset State