DSPIC30F6012A-30I/PF Microchip Technology, DSPIC30F6012A-30I/PF Datasheet - Page 231

• Manufacturer Part Number: DSPIC30F6012A-30I/PF
• Description: IC DSPIC MCU/DSP 144K 64TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F6012A-30I/PF

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 30 MIPs
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: AC'97, Brown-out Detect/Reset, I²S, LVD, POR, PWM, WDT
• Number Of I /o: 52
• Program Memory Size: 144KB (48K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• Core Frequency: 40MHz
• Core Supply Voltage: 5.5V
• Embedded Interface Type: CAN, I2C, SPI, UART
• No. Of I/o's: 52
• Flash Memory Size: 144KB
• Supply Voltage Range: 2.5V To 5.5V
• Package: 64TQFP
• Device Core: dsPIC
• Family Name: dsPIC30
• Maximum Speed: 30 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 52
• Interface Type: CAN/I2C/SPI/UART
• On-chip Adc: 16-chx12-bit
• Number Of Timers: 5
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT64PT4 - SOCKET TRAN ICE 64MQFP/TQFPAC164313 - MODULE SKT FOR PM3 64PFAC30F002 - MODULE SOCKET DSPIC30F 64TQFPDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

STATUS Register ............................................................... 18
Symbols used in Opcode Descriptions ............................. 166
System Integration ............................................................ 145
T
Table Instruction Operation Summary ................................ 53
Temperature and Voltage Specifications
Timer1 Module .................................................................... 71
Timer2 and Timer3 Selection Mode .................................... 90
Timer2/3 Module ................................................................. 75
Timer4/5 Module ................................................................. 81
Timing Characteristics
© 2008 Microchip Technology Inc.
Word and Byte Communication .................................. 93
Register Map for dsPIC30F601xA ............................ 163
AC ............................................................................. 186
16-bit Asynchronous Counter Mode ........................... 71
16-bit Synchronous Counter Mode ............................. 71
16-bit Timer Mode....................................................... 71
Gate Operation ........................................................... 72
Interrupt....................................................................... 73
Operation During Sleep Mode .................................... 72
Prescaler..................................................................... 72
Real-Time Clock ......................................................... 73
Register Map............................................................... 74
16-bit Timer Mode....................................................... 75
32-bit Synchronous Counter Mode ............................. 75
32-bit Timer Mode....................................................... 75
ADC Event Trigger...................................................... 78
Gate Operation ........................................................... 78
Interrupt....................................................................... 78
Operation During Sleep Mode .................................... 78
Register Map............................................................... 79
Timer Prescaler........................................................... 78
Register Map............................................................... 83
ADC
Band Gap Start-up Time ........................................... 193
CAN Module I/O........................................................ 210
CLKOUT and I/O....................................................... 190
DCI Module
External Clock........................................................... 186
I
I
Input Capture (CAPX) ............................................... 196
OC/PWM Module ...................................................... 197
Oscillator Start-up Timer ........................................... 191
Output Compare Module........................................... 196
Power-up Timer ........................................................ 191
Reset......................................................................... 191
SPI Module
Type A, B and C Timer External Clock ..................... 194
Watchdog Timer (WDT) ............................................ 191
2
2
C Bus Data
C Bus Start/Stop Bits
Slave Mode (CKE = 0) ...................................... 203
Slave Mode (CKE = 1) ...................................... 205
Interrupts............................................................. 73
Oscillator Operation ............................................ 73
Low-speed (ASAM = 0, SSRC = 000) .............. 213
AC-Link Mode ................................................... 200
Multichannel, I
Master Mode ..................................................... 206
Slave Mode ....................................................... 208
Master Mode ..................................................... 206
Slave Mode ....................................................... 208
Master Mode (CKE = 0) .................................... 201
Master Mode (CKE = 1) .................................... 202
Slave Mode (CKE = 0) ...................................... 203
Slave Mode (CKE = 1) ...................................... 204
2
dsPIC30F6011A/6012A/6013A/6014A
S Modes ................................... 198
Timing Diagrams
Timing Diagrams.See Timing Characteristics
Timing Requirements
Timing Specifications
Trap Vectors ....................................................................... 50
Traps .................................................................................. 49
U
UART Module
CAN Bit..................................................................... 118
Frame Sync, AC-Link Start of Frame ....................... 128
Frame Sync, Multi-Channel Mode ............................ 128
I
PWM Output ............................................................... 91
Time-out Sequence on Power-up
(MCLR Not Tied to V
Time-out Sequence on Power-up
(MCLR Not Tied to V
Time-out Sequence on Power-up
(MCLR Tied to V
Band Gap Start-up Time........................................... 193
Brown-out Reset....................................................... 192
CAN Module I/O ....................................................... 210
CLKOUT and I/O ...................................................... 190
DCI Module
External Clock .......................................................... 187
I
I
Input Capture............................................................ 196
Oscillator Start-up Timer........................................... 192
Output Compare Module .......................................... 196
Power-up Timer ........................................................ 192
Reset ........................................................................ 192
Simple OC/PWM Mode ............................................ 197
SPI Module
Type A Timer External Clock.................................... 194
Type B Timer External Clock.................................... 195
Type C Timer External Clock.................................... 195
Watchdog Timer (WDT)............................................ 192
External Clock Requirements ................................... 187
PLL Clock ................................................................. 188
PLL Jitter .................................................................. 188
Hard and Soft ............................................................. 50
Sources ...................................................................... 49
Address Detect Mode ............................................... 109
Auto Baud Support ................................................... 110
Baud Rate Generator ............................................... 109
Enabling and Setting Up........................................... 107
Framing Error (FERR) .............................................. 109
Idle Status................................................................. 109
Loopback Mode ........................................................ 109
Operation During CPU Sleep and Idle Modes.......... 110
Overview................................................................... 105
Parity Error (PERR) .................................................. 109
Receive Break .......................................................... 109
Receive Buffer (UxRXB)........................................... 108
2
2
2
S Interface Frame Sync ......................................... 128
C Bus Data (Master Mode) .................................... 207
C Bus Data (Slave Mode) ...................................... 209
AC-Link Mode................................................... 200
Multichannel, I
Master Mode (CKE = 0).................................... 201
Master Mode (CKE = 1).................................... 202
Slave Mode (CKE = 0)...................................... 203
Slave Mode (CKE = 1)...................................... 205
Address Error Trap ............................................. 49
Math Error Trap .................................................. 49
Oscillator Fail Trap ............................................. 50
Stack Error Trap ................................................. 50
DD
) ................................................. 156
2
S Modes................................... 199
DD
DD
), Case 1 ............................. 156
), Case 2 ............................. 157
DS70143D-page 231