PIC18F8621-I/PT Microchip Technology, PIC18F8621-I/PT Datasheet - Page 55

• Manufacturer Part Number: PIC18F8621-I/PT
• Description: IC PIC MCU FLASH 32KX16 80TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F8621-I/PT

• Core Size: 8-Bit
• Program Memory Size: 64KB (32K x 16)
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 69
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 3.75K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TFQFP
• Controller Family/series: PIC18
• No. Of I/o's: 70
• Eeprom Memory Size: 1024Byte
• Ram Memory Size: 3.75KB
• Cpu Speed: 40MHz
• No. Of Timers: 5
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3840 B
• Interface Type: MSSP, SPI, I2C, EUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 69
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM183032
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• Package: 80TQFP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT80PT3 - SOCKET TRAN ICE 80MQFP/TQFPAC164320 - MODULE SKT MPLAB PM3 80TQFPAC174011 - MODULE SKT PROMATEII 80TQFP
• Lead Free Status / Rohs Status: Details
• Other names: PIC18F8621-I/PTR; PIC18F8621-I/PTR

TABLE 4-3:
 2005 Microchip Technology Inc.
CMCON
TMR3H
TMR3L
T3CON
PSPCON
SPBRG1
RCREG1
TXREG1
TXSTA1
RCSTA1
EEADRH
EEADR
EEDATA
EECON2
EECON1
IPR3
PIR3
PIE3
IPR2
PIR2
PIE2
IPR1
PIR1
PIE1
MEMCON
TRISJ
TRISH
TRISG
TRISF
TRISE
TRISD
TRISC
TRISB
TRISA
LATJ
LATH
LATG
LATF
LATE
LATD
LATC
LATB
LATA
Legend:
Note
File Name
(3)
(3)
(3)
(3)
1:
2:
3:
4:
5:
(5)
(3)
x = unknown, u = unchanged, – = unimplemented, q = value depends on condition
RA6 and associated bits are configured as a port pin in RCIO and ECIO Oscillator modes only and read ‘0’ in all other
oscillator modes.
Bit 21 of the TBLPTRU allows access to the device configuration bits.
These registers are unused on PIC18F6525/6621 devices and read as ‘0’.
RG5 is available only if MCLR function is disabled in configuration.
Enabled only in Microcontroller mode for
Timer3 Register High Byte
Timer3 Register Low Byte
Enhanced USART1 Baud Rate Generator Register Low Byte
Enhanced USART1 Receive Register
Enhanced USART1 Transmit Register
Data EEPROM Address Register
Data EEPROM Data Register
Data EEPROM Control Register 2 (not a physical register)
Data Direction Control Register for PORTJ
Data Direction Control Register for PORTH
Data Direction Control Register for PORTF
Data Direction Control Register for PORTE
Data Direction Control Register for PORTD
Data Direction Control Register for PORTC
Data Direction Control Register for PORTB
Read PORTJ Data Latch, Write PORTJ Data Latch
Read PORTH Data Latch, Write PORTH Data Latch
Read PORTF Data Latch, Write PORTF Data Latch
Read PORTE Data Latch, Write PORTE Data Latch
Read PORTD Data Latch, Write PORTD Data Latch
Read PORTC Data Latch, Write PORTC Data Latch
Read PORTB Data Latch, Write PORTB Data Latch
PSPIP
PSPIF
PSPIE
EEPGD
C2OUT
EBDIS
CSRC
SPEN
RD16
Bit 7
IBF
—
—
—
—
—
—
—
—
—
—
—
REGISTER FILE SUMMARY (CONTINUED)
(5)
(5)
(5)
TRISA6
T3CCP2
LATA6
C1OUT
CFGS
CMIP
CMIE
CMIF
ADIP
ADIE
Bit 6
ADIF
OBF
TX9
RX9
—
—
—
—
—
—
—
(1)
(1)
Data Direction Control Register for PORTA
Read PORTA Data Latch, Write PORTA Data Latch
T3CKPS1
C2INV
RC2IP
RC2IE
RC1IP
RC1IE
WAIT1
SREN
RC2IF
RC1IF
TXEN
IBOV
Bit 5
—
—
—
—
—
—
—
Data Direction Control Register for PORTG
Read PORTG Data Latch, Write PORTG Data Latch
PIC18F6525/6621/8525/8621
PSPMODE
T3CKPS0
WAIT0
C1INV
CREN
SYNC
FREE
TX2IP
TX2IF
TX2IE
TX1IP
TX1IF
TX1IE
EEIP
EEIF
EEIE
PIC18F8525/8621 devices.
Bit 4
—
T3CCP1
WRERR
TMR4IP
TMR4IE
ADDEN
TMR4IF
SENDB
BCLIP
BCLIF
BCLIE
SSPIP
SSPIF
SSPIE
Bit 3
CIS
—
—
—
T3SYNC
CCP5IP
CCP5IF
CCP5IE
CCP1IP
CCP1IF
CCP1IE
WREN
BRGH
FERR
LVDIP
LVDIF
LVDIE
Bit 2
CM2
—
—
—
(1)
EE Addr Register High
TMR3CS
CCP4IP
CCP4IF
CCP4IE
TMR3IP
TMR3IF
TMR3IE
TMR2IP
TMR2IF
TMR2IE
OERR
TRMT
WM1
Bit 1
CM1
WR
—
TMR3ON
CCP3IP
CCP3IF
CCP3IE
CCP2IP
CCP2IF
CCP2IE
TMR1IP
TMR1IF
TMR1IE
RX9D
TX9D
WM0
Bit 0
CM0
RD
—
0000 0000
xxxx xxxx
xxxx xxxx
0000 0000
0000 ----
0000 0000
0000 0000
0000 0000
0000 0010
0000 000x
---- --00
0000 0000
0000 0000
---- ----
xx-0 x000
--11 1111
--00 0000
--00 0000
-1-1 1111
-0-0 0000
-0-0 0000
1111 1111
0000 0000
0000 0000
0-00 --00
1111 1111
1111 1111
---1 1111
1111 1111
1111 1111
1111 1111
1111 1111
1111 1111
-111 1111
xxxx xxxx
xxxx xxxx
---x xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
-xxx xxxx
POR, BOR
DS39612B-page 53
Value on
on page:
34, 243
34, 145
34, 145
34, 145
34, 129
34, 217
34, 224
34, 222
34, 214
34, 215
35, 100
35, 127
35, 124
35, 108
35, 105
35, 121
35, 127
35, 124
35, 121
35, 108
35, 105
Details
35, 119
35, 116
35, 113
35, 110
35, 119
35, 116
35, 113
35, 110
34, 83
34, 83
34, 83
34, 83
34, 80
35, 94
35, 97
35, 99
35, 93
35, 96
35, 98
35, 92
35, 95
35, 71