PIC18F8621-I/PT Microchip Technology, PIC18F8621-I/PT Datasheet - Page 113

• Manufacturer Part Number: PIC18F8621-I/PT
• Description: IC PIC MCU FLASH 32KX16 80TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F8621-I/PT

• Core Size: 8-Bit
• Program Memory Size: 64KB (32K x 16)
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 69
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 3.75K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TFQFP
• Controller Family/series: PIC18
• No. Of I/o's: 70
• Eeprom Memory Size: 1024Byte
• Ram Memory Size: 3.75KB
• Cpu Speed: 40MHz
• No. Of Timers: 5
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3840 B
• Interface Type: MSSP, SPI, I2C, EUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 69
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM183032
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• Package: 80TQFP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT80PT3 - SOCKET TRAN ICE 80MQFP/TQFPAC164320 - MODULE SKT MPLAB PM3 80TQFPAC174011 - MODULE SKT PROMATEII 80TQFP
• Lead Free Status / Rohs Status: Details
• Other names: PIC18F8621-I/PTR; PIC18F8621-I/PTR

10.4
PORTD is an 8-bit wide, bidirectional port. The corre-
sponding data direction register is TRISD. Setting a
TRISD bit (= 1) will make the corresponding PORTD
pin an input (i.e., put the corresponding output driver in
a high-impedance mode). Clearing a TRISD bit (= 0)
will make the corresponding PORTD pin an output (i.e.,
put the contents of the output latch on the selected pin).
The Data Latch register (LATD) is also memory
mapped. Read-modify-write operations on the LATD
register, read and write the latched output value for
PORTD.
PORTD is an 8-bit port with Schmitt Trigger input
buffers. Each pin is individually configurable as an input
or output.
PORTD is multiplexed with the system bus as the
external memory interface. I/O port functions are only
available when the system bus is disabled by setting
the
(MEMCON<7>). When operating as the external
memory interface, PORTD is the low-order byte of the
multiplexed address/data bus (AD7:AD0).
PORTD can also be configured as an 8-bit wide
microprocessor port (Parallel Slave Port) by setting
control bit PSPMODE (TRISE<4>). In this mode, the
input buffers are TTL. See Section 10.10 “Parallel
Slave Port” for additional information on the Parallel
Slave Port (PSP).
EXAMPLE 10-4:
 2005 Microchip Technology Inc.
CLRF
CLRF
MOVLW
MOVWF
Note:
EBDIS
PORTD, TRISD and LATD
Registers
PORTD
LATD
0xCF
TRISD
On a Power-on Reset, these pins are
configured as digital inputs.
bit
; Initialize PORTD by
; clearing output
; data latches
; Alternate method
; to clear output
; data latches
; Value used to
; initialize data
; direction
; Set RD<3:0> as inputs
; RD<5:4> as outputs
; RD<7:6> as inputs
in
INITIALIZING PORTD
the
MEMCOM
PIC18F6525/6621/8525/8621
register
FIGURE 10-9:
RD TRISD
RD PORTD
RD LATD
Data
Bus
WR TRISD
Note 1:
WR LATD
or
PORTD
I/O pins have diode protection to V
TRIS Latch
Data Latch
D
D
CK
CK
PORTD BLOCK DIAGRAM
IN I/O PORT MODE
Q
Q
Q
EN
DS39612B-page 111
EN
Schmitt
Trigger
Input
Buffer
D
DD
and V
SS
I/O pin
.
(1)