PIC18F8621-I/PT Microchip Technology, PIC18F8621-I/PT Datasheet - Page 275

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PIC18F8621-I/PT

Manufacturer Part Number
PIC18F8621-I/PT
Description
IC PIC MCU FLASH 32KX16 80TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F8621-I/PT

Core Size
8-Bit
Program Memory Size
64KB (32K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
69
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.75K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TFQFP
Controller Family/series
PIC18
No. Of I/o's
70
Eeprom Memory Size
1024Byte
Ram Memory Size
3.75KB
Cpu Speed
40MHz
No. Of Timers
5
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3840 B
Interface Type
MSSP, SPI, I2C, EUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
69
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM183032
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
Package
80TQFP
Device Core
PIC
Family Name
PIC18
Maximum Speed
40 MHz
Operating Supply Voltage
5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT80PT3 - SOCKET TRAN ICE 80MQFP/TQFPAC164320 - MODULE SKT MPLAB PM3 80TQFPAC174011 - MODULE SKT PROMATEII 80TQFP
Lead Free Status / Rohs Status
 Details
Other names
PIC18F8621-I/PTR
PIC18F8621-I/PTR

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0
FIGURE 24-6:
24.4.2
The entire data EEPROM is protected from external
reads and writes by two bits: CPD and WRTD. CPD
inhibits external reads and writes of data EEPROM.
WRTD inhibits external writes to data EEPROM. The
CPU can continue to read data EEPROM regardless of
the protection bit settings.
 2005 Microchip Technology Inc.
Results: Table reads permitted within Block n, even when EBTRBn = 0.
Register Values
TBLPTR = 000FFFh
DATA EEPROM CODE
PROTECTION
PC = 003FFEh
TABLAT register returns the value of the data at the location TBLPTR.
EXTERNAL BLOCK TABLE READ (EBTRn) ALLOWED
PIC18F6525/6621/8525/8621
Program Memory
TBLRD*
24.4.3
The Configuration registers can be write-protected.
The WRTC bit controls protection of the Configuration
registers. In user mode, the WRTC bit is readable only.
WRTC can only be written via ICSP or an external
programmer.
000000h
0007FFh
00BFFFh
00C000h
00FFFFh
000800h
003FFFh
004000h
007FFFh
008000h
CONFIGURATION REGISTER
PROTECTION
Configuration Bit Settings
WRTB,EBTRB = 11
WRT0,EBTR0 = 10
WRT1,EBTR1 = 11
WRT2,EBTR2 = 11
WRT3,EBTR3 = 11
DS39612B-page 273

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