PIC18F8621-I/PT Microchip Technology, PIC18F8621-I/PT Datasheet - Page 165

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PIC18F8621-I/PT

Manufacturer Part Number
PIC18F8621-I/PT
Description
IC PIC MCU FLASH 32KX16 80TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F8621-I/PT

Core Size
8-Bit
Program Memory Size
64KB (32K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
69
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.75K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TFQFP
Controller Family/series
PIC18
No. Of I/o's
70
Eeprom Memory Size
1024Byte
Ram Memory Size
3.75KB
Cpu Speed
40MHz
No. Of Timers
5
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3840 B
Interface Type
MSSP, SPI, I2C, EUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
69
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM183032
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
Package
80TQFP
Device Core
PIC
Family Name
PIC18
Maximum Speed
40 MHz
Operating Supply Voltage
5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT80PT3 - SOCKET TRAN ICE 80MQFP/TQFPAC164320 - MODULE SKT MPLAB PM3 80TQFPAC174011 - MODULE SKT PROMATEII 80TQFP
Lead Free Status / Rohs Status
 Details
Other names
PIC18F8621-I/PTR
PIC18F8621-I/PTR

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0
FIGURE 17-3:
17.4.4
In the Half-Bridge Output mode, two pins are used as
outputs to drive push-pull loads. The PWM output sig-
nal is output on the P1A pin, while the complementary
PWM output signal is output on the P1B pin
(Figure 17-4). This mode can be used for half-bridge
applications, as shown in Figure 17-5, or for full-bridge
applications, where four power switches are being
modulated with two PWM signals.
In Half-Bridge Output mode, the programmable
dead-band delay can be used to prevent shoot-through
current in half-bridge power devices. The value of bits
PDC6:PDC0 sets the number of instruction cycles
before the output is driven active. If the value is greater
than the duty cycle, the corresponding output remains
inactive during the entire cycle. See Section 17.4.6
“Programmable Dead-Band Delay” for more details
on dead-band delay operations.
Since the P1A and P1B outputs are multiplexed with
the PORTC<2> and PORTE<6> data latches, the
TRISC<2> and TRISE<6> bits must be cleared to
configure P1A and P1B as outputs.
 2005 Microchip Technology Inc.
Relationships:
• Period = 4 * T
• Duty Cycle = T
• Delay = 4 * T
Note 1:
00
10
01
11
HALF-BRIDGE MODE
(Single Output)
CCP1CON
(Half-Bridge)
(Full-Bridge,
(Full-Bridge,
Reverse)
Forward)
<7:6>
Dead-band delay is programmed using the ECCP1DEL register (Section 17.4.6 “Programmable
Dead-Band Delay”).
OSC
OSC
PWM OUTPUT RELATIONSHIPS (ACTIVE-LOW STATE)
OSC
* (ECCP1DEL<6:0>)
* (PR2 + 1) * (TMR2 Prescale Value)
* (CCPR1L<7:0>:CCP1CON<5:4>) * (TMR2 Prescale Value)
P1A Modulated
P1A Modulated
P1B Modulated
P1A Active
P1B Inactive
P1C Inactive
P1D Modulated
P1A Inactive
P1B Modulated
P1C Active
P1D Inactive
SIGNAL
PIC18F6525/6621/8525/8621
0
Delay
(1)
FIGURE 17-4:
P1A
P1B
Note 1: At this time, the TMR2 register is equal to the
Cycle
td = Dead Band Delay
Duty
(2)
(2)
2: Output signals are shown as active-high.
(1)
PR2 register.
td
Duty Cycle
Delay
Period
Period
(1)
td
HALF-BRIDGE PWM
OUTPUT
(1)
DS39612B-page 163
Period
PR2 + 1
(1)

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