PIC17C43-16/P Microchip Technology, PIC17C43-16/P Datasheet - Page 117

• Manufacturer Part Number: PIC17C43-16/P
• Description: IC MCU OTP 4KX16 PWM 40DIP
• Manufacturer: Microchip Technology
• Series: PIC® 17Cr

Specifications of PIC17C43-16/P

• Core Size: 8-Bit
• Program Memory Size: 8KB (4K x 16)
• Core Processor: PIC
• Speed: 16MHz
• Connectivity: UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 33
• Program Memory Type: OTP
• Ram Size: 454 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 6 V
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Controller Family/series: PIC17
• No. Of I/o's: 33
• Ram Memory Size: 454Byte
• Cpu Speed: 16MHz
• No. Of Timers: 4
• No. Of Pwm Channels: 2
• Embedded Interface Type: USART
• Rohs Compliant: Yes
• Processor Series: PIC17C
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 454 B
• Interface Type: SCI, USART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 33
• Number Of Timers: 8
• Operating Supply Voltage: 2.5 V to 6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: Through Hole
• Development Tools By Supplier: ICE2000
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DVA17XP401 - DEVICE ADAPTER FOR PIC17C42AAC174001 - MODULE SKT PROMATEII 40DIP
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

CALL
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example:
1996 Microchip Technology Inc.
Before Instruction
After Instruction
Forced NOP
Decode
PC =
PC =
TOS =
Q1
Read literal
Address(HERE)
Address(THERE)
Address (HERE + 1)
Subroutine Call
[ label ] CALL k
0
PC+ 1
k<12:8>
PC<15:13>
Subroutine call within 8K page. First,
return address (PC+1) is pushed onto
the stack. The 13-bit value is loaded into
PC bits<12:0>. Then the upper-eight
bits of the PC are copied into PCLATH.
Call is a two-cycle instruction.
See LCALL for calls outside 8K memory
space.
1
2
HERE
None
'k'<7:0>
NOP
111k
Q2
k
4095
TOS, k
kkkk
CALL
PCLATH<4:0>;
Execute
Execute
PCLATH<7:5>
Q3
THERE
PC<12:0>,
kkkk
NOP
NOP
Q4
kkkk
CLRF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example:
Before Instruction
After Instruction
Decode
FLAG_REG
FLAG_REG
Q1
register 'f'
Clear f
[ label ] CLRF
0
00h
00h
None
Clears the contents of the specified reg-
ister(s).
s = 0: Data memory location 'f' and
WREG are cleared.
s = 1: Data memory location 'f' is
cleared.
1
1
CLRF
Read
0010
Q2
=
=
f
255
f, s
dest
0x5A
0x00
PIC17C4X
100s
Execute
[0,1]
FLAG_REG
f,s
Q3
DS30412C-page 117
ffff
register 'f'
and other
specified
register
Write
Q4
ffff