AT91M40800-33AU Atmel, AT91M40800-33AU Datasheet - Page 129

• Manufacturer Part Number: AT91M40800-33AU
• Description: IC ARM7 MCU 100 LQFP
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91M40800-33AU

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, UART/USART
• Peripherals: POR, WDT
• Number Of I /o: 32
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Package: 100TQFP
• Device Core: ARM7TDMI
• Family Name: 91M
• Maximum Speed: 33 MHz
• Operating Supply Voltage: 2.5|3.3 V
• Data Bus Width: 32 Bit
• Number Of Programmable I/os: 32
• Interface Type: EBI/USART
• Number Of Timers: 3
• Processor Series: AT91Mx
• Core: ARM7TDMI
• Data Ram Size: 8 KB
• Maximum Clock Frequency: 33 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Minimum Operating Temperature: - 40 C
• Eeprom Memory: 0 Bytes
• Input Output: 32
• Interface: EBI/EMI, UART/USART
• Ios: 32
• Memory Type: ROMless
• Number Of Bits: 32
• Package Type: 100-pin LQFP
• Programmable Memory: 0 Bytes
• Timers: 3-16-bit
• Voltage, Range: 1.8-3.6 V
• Cpu Family: 91M
• Device Core Size: 32b
• Frequency (max): 33MHz
• Program Memory Size: Not Required
• Total Internal Ram Size: 8KB
• # I/os (max): 32
• Number Of Timers - General Purpose: 3
• Operating Supply Voltage (typ): 2.5/3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 1.8V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 100
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Output Controller
Status
1354D–ATARM–08/02
The output controller defines the output level changes on TIOA and TIOB following an
event. TIOB control is used only if TIOB is defined as output (not as an external event).
The following events control TIOA and TIOB: software trigger, external event and RC
compare. RA compare controls TIOA and RB compare controls TIOB. Each of these
events can be programmed to set, clear or toggle the output as defined in the corre-
sponding parameter in TC_CMR.
The tables below show which parameter in TC_CMR is used to define the effect of each
event.
If two or more events occur at the same time, the priority level is defined as follows:
1. Software Trigger
2. External Event
3. RC Compare
4. RA or RB Compare
The following bits in the status register are significant in Waveform Mode:
•
•
•
•
•
Note:
Parameter
ASWTRG
AEEVT
ACPC
ACPA
Parameter
BSWTRG
BEEVT
BCPC
BCPB
CPAS: RA Compare Status
There has been a RA Compare match at least once since the last read of the status
CPBS: RB Compare Status
There has been a RB Compare match at least once since the last read of the status
CPCS: RC Compare Status
There has been a RC Compare match at least once since the last read of the status
COVFS: Counter Overflow
Counter has attempted to count past $FFFF since the last read of the status
ETRGS: External Trigger
External trigger has been detected since the last read of the status
All the status bits are set when the corresponding event occurs and they are automati-
cally cleared when the Status Register is read.
TIOA Event
Software Trigger
External Event
RC Compare
RA Compare
TIOB Event
Software Trigger
External Event
RC Compare
RB Compare
AT91X40 Series
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