ATMEGA169PV-8AU Atmel, ATMEGA169PV-8AU Datasheet - Page 284

IC AVR MCU 16K 8MHZ 1.8V 64-TQFP

ATMEGA169PV-8AU

Manufacturer Part Number
ATMEGA169PV-8AU
Description
IC AVR MCU 16K 8MHZ 1.8V 64-TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA169PV-8AU

Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Processor Series
ATMEGA16x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SPI, USART, USI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
54
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Cpu Family
ATmega
Device Core
AVR
Device Core Size
8b
Frequency (max)
8MHz
Total Internal Ram Size
1KB
# I/os (max)
54
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
2.5/3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
1.8V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
64
Package Type
TQFP
Package
64TQFP
Family Name
ATmega
Maximum Speed
8 MHz
Operating Supply Voltage
2.5|3.3|5 V
Controller Family/series
AVR MEGA
No. Of I/o's
54
Eeprom Memory Size
512Byte
Ram Memory Size
1KB
Cpu Speed
8MHz
Rohs Compliant
Yes
For Use With
ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEMATAVRBFLY - KIT EVALUATION AVR BUTTERFLYATSTK502 - MOD EXPANSION AVR STARTER 500ATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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26.5
8018P–AVR–08/10
Boot Loader Lock Bits
If no Boot Loader capability is needed, the entire Flash is available for application code. The
Boot Loader has two separate sets of Boot Lock bits which can be set independently. This gives
the user a unique flexibility to select different levels of protection.
The user can select:
• To protect the entire Flash from a software update by the MCU.
• To protect only the Boot Loader Flash section from a software update by the MCU.
• To protect only the Application Flash section from a software update by the MCU.
• Allow software update in the entire Flash.
See
be set in software and in Serial or Parallel Programming mode, but they can be cleared by a
Chip Erase command only. The general Write Lock (Lock Bit mode 2) does not control the pro-
gramming of the Flash memory by SPM instruction. Similarly, the general Read/Write Lock
(Lock Bit mode 1) does not control reading nor writing by LPM/SPM, if it is attempted.
Table 26-2.
Note:
Table 26-3.
Note:
BLB0 Mode
BLB1 Mode
Table 26-2
1
2
3
4
1
2
3
4
1. “1” means unprogrammed, “0” means programmed
1. “1” means unprogrammed, “0” means programmed
Boot Lock Bit0 Protection Modes (Application Section)
Boot Lock Bit1 Protection Modes (Boot Loader Section)
and
BLB02
BLB12
1
1
0
0
1
1
0
0
Table 26-3
BLB01
BLB11
1
0
0
1
1
0
0
1
for further details. The Boot Lock bits and general Lock bits can
Protection
No restrictions for SPM or LPM accessing the Application
section.
SPM is not allowed to write to the Application section.
SPM is not allowed to write to the Application section, and LPM
executing from the Boot Loader section is not allowed to read
from the Application section. If Interrupt Vectors are placed in
the Boot Loader section, interrupts are disabled while executing
from the Application section.
LPM executing from the Boot Loader section is not allowed to
read from the Application section. If Interrupt Vectors are placed
in the Boot Loader section, interrupts are disabled while
executing from the Application section.
Protection
No restrictions for SPM or LPM accessing the Boot Loader
section.
SPM is not allowed to write to the Boot Loader section.
SPM is not allowed to write to the Boot Loader section, and LPM
executing from the Application section is not allowed to read
from the Boot Loader section. If Interrupt Vectors are placed in
the Application section, interrupts are disabled while executing
from the Boot Loader section.
LPM executing from the Application section is not allowed to
read from the Boot Loader section. If Interrupt Vectors are
placed in the Application section, interrupts are disabled while
executing from the Boot Loader section.
(1)
(1)
ATmega169P
284

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