ATMEGA169PV-8AU Atmel, ATMEGA169PV-8AU Datasheet - Page 248

IC AVR MCU 16K 8MHZ 1.8V 64-TQFP

ATMEGA169PV-8AU

Manufacturer Part Number
ATMEGA169PV-8AU
Description
IC AVR MCU 16K 8MHZ 1.8V 64-TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA169PV-8AU

Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Processor Series
ATMEGA16x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SPI, USART, USI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
54
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Cpu Family
ATmega
Device Core
AVR
Device Core Size
8b
Frequency (max)
8MHz
Total Internal Ram Size
1KB
# I/os (max)
54
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
2.5/3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
1.8V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
64
Package Type
TQFP
Package
64TQFP
Family Name
ATmega
Maximum Speed
8 MHz
Operating Supply Voltage
2.5|3.3|5 V
Controller Family/series
AVR MEGA
No. Of I/o's
54
Eeprom Memory Size
512Byte
Ram Memory Size
1KB
Cpu Speed
8MHz
Rohs Compliant
Yes
For Use With
ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEMATAVRBFLY - KIT EVALUATION AVR BUTTERFLYATSTK502 - MOD EXPANSION AVR STARTER 500ATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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23.5.3
8018P–AVR–08/10
LCDFRR – LCD Frame Rate Register
Table 23-3.
• Bit 7 – Res: Reserved Bit
This bit is reserved and will always read as zero.
• Bits 6:4 – LCDPS2:0: LCD Prescaler Select
The LCDPS2:0 bits selects tap point from a prescaler. The prescaled output can be further
divided by setting the clock divide bits (LCDCD2:0). The different selections are shown in
23-4. Together they determine the prescaled LCD clock (clk
module.
Table 23-4.
Bit
(0xE6)
Read/Write
Initial Value
LCDPS2
LCDPM2
0
0
0
0
1
1
1
1
1
1
1
1
LCDPS1
LCD Port Mask (Continued)
LCD Prescaler Select
LCDPM1
R
7
0
0
0
1
1
0
0
1
1
0
0
1
1
LCDPS2
R/W
6
0
LCDPS0
0
1
0
1
0
1
0
1
LCDPM0
LCDPS1
0
1
0
1
R/W
5
0
Output from
clk
clk
clk
Prescaler
clk
clk
clk
clk
clk
clk
LCDPS0
LCD
LCD
LCD
LCD
LCD
LCD
I/O Port in Use as Segment
R/W
LCD
LCD
LCD
4
0
/1024
/2048
/4096
/128
/256
/512
/16
/64
/N
SEG0:20
SEG0:22
SEG0:23
SEG0:24
Driver
R
3
0
Applied Prescaled LCD Clock Frequency
when LCDCD2:0 = 0, Duty = 1/4, and
LCDCD2
LCD_PS
R/W
2
0
Frame Rate = 64Hz
), which is clocking the LCD
LCDCD1
R/W
ATmega169P
130 kHz
260 kHz
520 kHz
8.1 kHz
1
0
33 kHz
66 kHz
1 MHz
2 MHz
Maximum Number of
LCDCD0
Segments
R/W
0
0
21
23
24
25
LCDFRR
Table
248

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