DSPIC33FJ32GP302-I/SP Microchip Technology, DSPIC33FJ32GP302-I/SP Datasheet - Page 264

• Manufacturer Part Number: DSPIC33FJ32GP302-I/SP
• Description: IC DSPIC MCU/DSP 32K 28SPDIP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ32GP302-I/SP

• Program Memory Type: FLASH
• Program Memory Size: 32KB (32K x 8)
• Package / Case: 28-DIP (0.300", 7.62mm)
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: AC'97, Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 21
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 10x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Product: DSCs
• Data Bus Width: 16 bit
• Processor Series: DSPIC33F
• Core: dsPIC
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 21
• Data Ram Size: 4 KB
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DV164033
• Minimum Operating Temperature: - 40 C
• Package: 28SPDIP
• Device Core: dsPIC
• Family Name: dSPIC33
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 3.3 V
• Interface Type: I2C/SPI/UART
• On-chip Adc: 10-chx10-bit|10-chx12-bit
• Number Of Timers: 3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

dsPIC33FJ32GP202/204 and dsPIC33FJ16GP304
I
In-Circuit Debugger ........................................................... 189
In-Circuit Emulation........................................................... 183
In-Circuit Serial Programming (ICSP) ....................... 183, 189
Input Capture
Input Change Notification.................................................. 114
Instruction Addressing Modes............................................. 47
Instruction Set
Instruction-Based Power-Saving Modes ........................... 109
Internal RC Oscillator
Internet Address................................................................ 267
Interrupt Control and Status Registers................................ 75
Interrupt Setup Procedures ................................................. 97
Interrupt Vector Table (IVT) ................................................ 71
Interrupts Coincident with Power Save Instructions.......... 110
J
JTAG Boundary Scan Interface ........................................ 183
M
Memory Organization.......................................................... 31
Microchip Internet Web Site .............................................. 267
Modulo Addressing ............................................................. 49
MPLAB ASM30 Assembler, Linker, Librarian ................... 200
MPLAB Integrated Development Environment Software .. 199
MPLAB PM3 Device Programmer..................................... 202
MPLAB REAL ICE In-Circuit Emulator System................. 201
MPLINK Object Linker/MPLIB Object Librarian ................ 200
N
NVM Module
O
Open-Drain Configuration ................................................. 114
Output Compare................................................................ 145
DS70290F-page 264
2
C Module
Registers ................................................................... 155
I2C1 Register Map ...................................................... 40
Registers ................................................................... 144
File Register Instructions ............................................ 47
Fundamental Modes Supported.................................. 48
MAC Instructions......................................................... 48
MCU Instructions ........................................................ 47
Move and Accumulator Instructions ............................ 48
Other Instructions........................................................ 48
Overview ................................................................... 194
Summary................................................................... 191
Idle ............................................................................ 110
Sleep ......................................................................... 109
Use with WDT ........................................................... 187
IECx ............................................................................ 75
IFSx............................................................................. 75
INTCON1 .................................................................... 75
INTCON2 .................................................................... 75
IPCx ............................................................................ 75
Initialization ................................................................. 97
Interrupt Disable.......................................................... 97
Interrupt Service Routine ............................................ 97
Trap Service Routine .................................................. 97
Applicability ................................................................. 50
Operation Example ..................................................... 49
Start and End Address ................................................ 49
W Address Register Selection .................................... 49
Register Map............................................................... 46
Registers ................................................................... 147
Preliminary
P
Packaging ......................................................................... 247
Peripheral Module Disable (PMD) .................................... 110
Pinout I/O Descriptions (table)............................................ 13
PMD Module
PORTA
PORTB
Power-on Reset (POR)....................................................... 68
Power-Saving Features .................................................... 109
Program Address Space..................................................... 31
Program Memory
R
Reader Response............................................................. 268
Registers
Details....................................................................... 248
Marking ..................................................................... 247
Register Map .............................................................. 46
Register Map .............................................................. 45
Register Map .............................................................. 45
Clock Frequency and Switching ............................... 109
Construction ............................................................... 52
Data Access from Program Memory Using Program
Data Access from Program Memory Using Table Instruc-
Data Access from, Address Generation ..................... 53
Memory Map............................................................... 31
Table Read Instructions
Visibility Operation ...................................................... 55
Interrupt Vector ........................................................... 32
Organization ............................................................... 32
Reset Vector ............................................................... 32
AD1CHS0 (ADC1 Input Channel 0 Select ................ 179
AD1CHS123 (ADC1 Input Channel 1, 2, 3 Select)... 177
AD1CON1 (ADC1 Control 1) .................................... 173
AD1CON2 (ADC1 Control 2) .................................... 175
AD1CON3 (ADC1 Control 3) .................................... 176
AD1CSSL (ADC1 Input Scan Select Low)................ 181
AD1PCFGL (ADC1 Port Configuration Low) ............ 181
CLKDIV (Clock Divisor) ............................................ 104
CORCON (Core Control) ...................................... 24, 76
I2CxCON (I2Cx Control) ........................................... 157
I2CxMSK (I2Cx Slave Mode Address Mask) ............ 161
I2CxSTAT (I2Cx Status) ........................................... 159
ICxCON (Input Capture x Control)............................ 144
IEC0 (Interrupt Enable Control 0) ................... 84, 86, 87
IFS0 (Interrupt Flag Status 0) ..................................... 80
IFS1 (Interrupt Flag Status 1) ..................................... 82
IFS4 (Interrupt Flag Status 4) ..................................... 83
INTCON1 (Interrupt Control 1).................................... 77
INTCON2 (Interrupt Control 2).................................... 79
INTTREG Interrupt Control and Status Register ........ 96
IPC0 (Interrupt Priority Control 0) ............................... 88
IPC1 (Interrupt Priority Control 1) ............................... 89
IPC16 (Interrupt Priority Control 16) ........................... 95
IPC2 (Interrupt Priority Control 2) ............................... 90
IPC3 (Interrupt Priority Control 3) ............................... 91
IPC4 (Interrupt Priority Control 4) ............................... 92
IPC5 (Interrupt Priority Control 5) ............................... 93
IPC7 (Interrupt Priority Control 7) ............................... 94
NVMCOM (Flash Memory Control)....................... 59, 60
OCxCON (Output Compare x Control) ..................... 147
Space Visibility ................................................... 55
tions .................................................................... 54
TBLRDH ............................................................. 54
TBLRDL.............................................................. 54
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