DSPIC33FJ32GP302-I/SP Microchip Technology, DSPIC33FJ32GP302-I/SP Datasheet - Page 169

IC DSPIC MCU/DSP 32K 28SPDIP

DSPIC33FJ32GP302-I/SP

Manufacturer Part Number
DSPIC33FJ32GP302-I/SP
Description
IC DSPIC MCU/DSP 32K 28SPDIP
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr

Specifications of DSPIC33FJ32GP302-I/SP

Program Memory Type
FLASH
Program Memory Size
32KB (32K x 8)
Package / Case
28-DIP (0.300", 7.62mm)
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
AC'97, Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
21
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Product
DSCs
Data Bus Width
16 bit
Processor Series
DSPIC33F
Core
dsPIC
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
21
Data Ram Size
4 KB
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DV164033
Minimum Operating Temperature
- 40 C
Package
28SPDIP
Device Core
dsPIC
Family Name
dSPIC33
Maximum Speed
40 MHz
Operating Supply Voltage
3.3 V
Interface Type
I2C/SPI/UART
On-chip Adc
10-chx10-bit|10-chx12-bit
Number Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
18.0
The dsPIC33FJ32GP202/204 and dsPIC33FJ16GP304
devices have up to 13 Analog-to-Digital Conversion
(ADC) module input channels.
The AD12B bit (AD1CON1<10>) allows each of the
ADC modules to be configured as either a 10-bit,
4-sample-and-hold ADC (default configuration) or a
12-bit, 1-sample-and-hold ADC.
18.1
The 10-bit ADC configuration has the following key
features:
• Successive Approximation (SAR) conversion
• Conversion speeds of up to 1.1 Msps
• Up to 13 analog input pins
• External voltage reference input pins
• Simultaneous sampling of up to four analog input
• Automatic Channel Scan mode
• Selectable conversion trigger source
• Selectable Buffer Fill modes
• Four result alignment options (signed/unsigned,
• Operation during CPU Sleep and Idle modes
• 16-word conversion result buffer
 2009 Microchip Technology Inc.
Note:
pins
fractional/integer)
Note 1: This data sheet summarizes the features
2: Some registers and associated bits
10-BIT/12-BIT
ANALOG-TO-DIGITAL
CONVERTER (ADC)
Key Features
The ADC module must be disabled before
the AD12B bit can be modified.
of
dsPIC33FJ16GP304 family of devices. It
is not intended to be a comprehensive
reference source. To complement the
information in this data sheet, refer to
Section 28. “Analog-to-Digital Con-
verter (ADC) without DMA” (DS70210)
of the “dsPIC33F/PIC24H Family Refer-
ence Manual”, which is available on the
Microchip website (www.microchip.com).
described in this section may not be avail-
able on all devices. Refer to Section 4.0
“Memory Organization” in this data
sheet for device-specific register and bit
information.
dsPIC33FJ32GP202/204 and dsPIC33FJ16GP304
the
dsPIC33FJ32GP202/204 and
Preliminary
The 12-bit ADC configuration supports all the above
features, except:
• In the 12-bit configuration, conversion speeds of
• There is only one sample-and-hold amplifier in the
Depending on the particular device pinout, the ADC
can have up to 13 analog input pins, designated AN0
through AN12. In addition, there are two analog input
pins for external voltage reference connections. These
voltage reference inputs can be shared with other ana-
log input pins.
The actual number of analog input pins and external
voltage reference input configuration will depend on the
specific device. Refer to the device data sheet for
further details.
A
dsPIC33FJ16GP304 and dsPIC33FJ32GP204 devices
is shown in Figure 18-1. A block diagram of the ADC for
the
Figure 18-2.
18.2
To configure the ADC module:
1.
2.
3.
4.
5.
6.
7.
up to 500 ksps are supported.
12-bit configuration, so simultaneous sampling of
multiple channels is not supported.
Select
(AD1PCFGH<15:0> or AD1PCFGL<15:0>).
Select voltage reference source to match
expected
(AD1CON2<15:13>).
Select the analog conversion clock to match
desired
(AD1CON3<7:0>).
Determine
channels will be used (AD1CON2<9:8> and
AD1PCFGH<15:0> or AD1PCFGL<15:0>).
Select
sequence
AD1CON3<12:8>).
Select the way conversion results are presented
in the buffer (AD1CON1<9:8>).
e)
Configure ADC interrupt (if required):
a)
b)
block
dsPIC33FJ32GP202
ADC Initialization
Turn on the ADC module (AD1CON1<15>).
Clear the AD1IF bit.
Select ADC interrupt priority.
the
diagram
port
data
range
how
appropriate
rate
pins
(AD1CON1<7:5>
of
many
with
on
device
as
the
sample/conversion
processor
analog
sample-and-hold
DS70290F-page 169
analog
ADC
is
shown
for
inputs
inputs
clock
and
the
in

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