DSPIC33FJ32GP302-I/SP Microchip Technology, DSPIC33FJ32GP302-I/SP Datasheet - Page 183

• Manufacturer Part Number: DSPIC33FJ32GP302-I/SP
• Description: IC DSPIC MCU/DSP 32K 28SPDIP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ32GP302-I/SP

• Program Memory Type: FLASH
• Program Memory Size: 32KB (32K x 8)
• Package / Case: 28-DIP (0.300", 7.62mm)
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: AC'97, Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 21
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 10x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Product: DSCs
• Data Bus Width: 16 bit
• Processor Series: DSPIC33F
• Core: dsPIC
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 21
• Data Ram Size: 4 KB
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DV164033
• Minimum Operating Temperature: - 40 C
• Package: 28SPDIP
• Device Core: dsPIC
• Family Name: dSPIC33
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 3.3 V
• Interface Type: I2C/SPI/UART
• On-chip Adc: 10-chx10-bit|10-chx12-bit
• Number Of Timers: 3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

19.0
dsPIC33FJ32GP202/204 and dsPIC33FJ16GP304
devices include several features intended to maximize
application flexibility and reliability, and minimize cost
through elimination of external components. These are:
• Flexible configuration
• Watchdog Timer (WDT)
• Code Protection and CodeGuard™ Security
• JTAG Boundary Scan Interface
• In-Circuit Serial Programming™ (ICSP™)
• In-Circuit emulation
TABLE 19-1:
 2009 Microchip Technology Inc.
0xF80000
0xF80002
0xF80004
0xF80006
0xF80008
0xF8000A FWDT
0xF8000C FPOR
0xF8000E FICD
0xF80010
0xF80012
0xF80014
0xF80016
Legend: — = unimplemented bit, read as ‘0’.
Note 1:
Note:
Address
2:
SPECIAL FEATURES
These bits are reserved for use by development tools and must be programmed as ‘1’.
These bits are reserved and always read as ‘1’.
This data sheet summarizes the features
of
dsPIC33FJ16GP304 devices. It is not
intended to be a comprehensive reference
source. To complement the information in
this
“dsPIC33F/PIC24H
Manual”. Please see the Microchip web
site (www.microchip.com) for the latest
dsPIC33F/PIC24H
Manual sections.
FOSCSEL
FUID0
FUID1
FUID2
FUID3
FBS
Reserved
FGS
FOSC
dsPIC33FJ32GP202/204 and dsPIC33FJ16GP304
the
Name
DEVICE CONFIGURATION REGISTER MAP
data
dsPIC33FJ32GP202/204
sheet,
FWDTEN
IESO
Bit 7
FCKSM<1:0>
—
—
—
Reserved
Family
Family
refer
Reserved
WINDIS
(1)
Bit 6
—
—
—
—
Reference
Reference
to
(2)
and
IOL1WAY
the
Preliminary
JTAGEN
Bit 5
—
—
—
—
—
User Unit ID Byte 0
User Unit ID Byte 1
User Unit ID Byte 2
User Unit ID Byte 3
19.1
The Configuration bits can be programmed (read as
‘0’), or left unprogrammed (read as ‘1’), to select
various device configurations. These bits are mapped
starting at program memory location 0xF80000.
The Device Configuration register map is shown in
Table 19-1.
The individual Configuration bit descriptions for the
Configuration registers are shown in Table 19-2.
Note that address 0xF80000 is beyond the user program
memory space. It belongs to the configuration memory
space (0x800000-0xFFFFFF), which can only be
accessed using table reads and table writes.
To prevent inadvertent configuration changes during
code execution, all programmable Configuration bits
are write-once. After a bit is initially programmed during
a power cycle, it cannot be written to again. Changing
a device configuration requires that power to the device
be cycled.
WDTPRE
ALTI2C
Bit 4
—
—
—
—
—
Configuration Bits
—
Bit 3
—
—
—
—
—
BSS<2:0>
OSCIOFNC POSCMD<1:0>
WDTPOST<3:0>
Bit 2
—
—
GSS<1:0>
FNOSC<2:0>
FPWRT<2:0>
DS70290F-page 183
Bit 1
—
ICS<1:0>
GWRP
BWRP
Bit 0
—