DSPIC33FJ32GP302-I/SP Microchip Technology, DSPIC33FJ32GP302-I/SP Datasheet - Page 185

IC DSPIC MCU/DSP 32K 28SPDIP

DSPIC33FJ32GP302-I/SP

Manufacturer Part Number
DSPIC33FJ32GP302-I/SP
Description
IC DSPIC MCU/DSP 32K 28SPDIP
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr

Specifications of DSPIC33FJ32GP302-I/SP

Program Memory Type
FLASH
Program Memory Size
32KB (32K x 8)
Package / Case
28-DIP (0.300", 7.62mm)
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
AC'97, Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
21
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Product
DSCs
Data Bus Width
16 bit
Processor Series
DSPIC33F
Core
dsPIC
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
21
Data Ram Size
4 KB
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DV164033
Minimum Operating Temperature
- 40 C
Package
28SPDIP
Device Core
dsPIC
Family Name
dSPIC33
Maximum Speed
40 MHz
Operating Supply Voltage
3.3 V
Interface Type
I2C/SPI/UART
On-chip Adc
10-chx10-bit|10-chx12-bit
Number Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
TABLE 19-2:
 2009 Microchip Technology Inc.
WDTPOST<3:0>
POSCMD<1:0>
FCKSM<1:0>
FPWRT<2:0>
OSCIOFNC
IOL1WAY
WDTPRE
FWDTEN
ICS<1:0>
Bit Field
JTAGEN
WINDIS
ALTI2C
dsPIC33FJ32GP202/204 and dsPIC33FJ16GP304
dsPIC33FJ32GP202/204 and dsPIC33FJ16GP304 CONFIGURATION BITS
DESCRIPTION (CONTINUED)
Register
FWDT
FWDT
FWDT
FWDT
FOSC
FOSC
FOSC
FOSC
FPOR
FPOR
FICD
FICD
Clock Switching Mode bits
1x = Clock switching is disabled, Fail-Safe Clock Monitor is disabled
01 = Clock switching is enabled, Fail-Safe Clock Monitor is disabled
00 = Clock switching is enabled, Fail-Safe Clock Monitor is enabled
Peripheral Pin Select Configuration
1 = Allow only one re-configuration
0 = Allow multiple re-configurations
OSC2 Pin Function bit (except in XT and HS modes)
1 = OSC2 is clock output
0 = OSC2 is general purpose digital I/O pin
Primary Oscillator Mode Select bits
11 = Primary oscillator disabled
10 = HS Crystal Oscillator mode
01 = XT Crystal Oscillator mode
00 = EC (External Clock) mode
Watchdog Timer Enable bit
1 = Watchdog Timer always enabled (LPRC oscillator cannot be disabled.
0 = Watchdog Timer enabled/disabled by user software (LPRC can be
Watchdog Timer Window Enable bit
1 = Watchdog Timer in Non-Window mode
0 = Watchdog Timer in Window mode
Watchdog Timer Prescaler bit
1 = 1:128
0 = 1:32
Watchdog Timer Postscaler bits
1111 = 1:32,768
1110 = 1:16,384
0001 = 1:2
0000 = 1:1
Alternate I
1 = I
0 = I
Power-on Reset Timer Value Select bits
111 = PWRT = 128 ms
110 = PWRT = 64 ms
101 = PWRT = 32 ms
100 = PWRT = 16 ms
011 = PWRT = 8 ms
010 = PWRT = 4 ms
001 = PWRT = 2 ms
000 = PWRT = Disabled
JTAG Enable bit
1 = JTAG enabled
0 = JTAG disabled
ICD Communication Channel Select bits
11 = Communicate on PGEC1 and PGED1
10 = Communicate on PGEC2 and PGED2
01 = Communicate on PGEC3 and PGED3
00 = Reserved, do not use
.
.
.
2
2
Clearing the SWDTEN bit in the RCON register will have no effect.)
disabled by clearing the SWDTEN bit in the RCON register)
C mapped to SDA1/SCL1 pins
C mapped to ASDA1/ASCL1 pins
Preliminary
2
C pins
Description
DS70290F-page 185

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