DSPIC33FJ32GP302-I/SP Microchip Technology, DSPIC33FJ32GP302-I/SP Datasheet - Page 143

• Manufacturer Part Number: DSPIC33FJ32GP302-I/SP
• Description: IC DSPIC MCU/DSP 32K 28SPDIP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ32GP302-I/SP

• Program Memory Type: FLASH
• Program Memory Size: 32KB (32K x 8)
• Package / Case: 28-DIP (0.300", 7.62mm)
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: AC'97, Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 21
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 10x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Product: DSCs
• Data Bus Width: 16 bit
• Processor Series: DSPIC33F
• Core: dsPIC
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 21
• Data Ram Size: 4 KB
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DV164033
• Minimum Operating Temperature: - 40 C
• Package: 28SPDIP
• Device Core: dsPIC
• Family Name: dSPIC33
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 3.3 V
• Interface Type: I2C/SPI/UART
• On-chip Adc: 10-chx10-bit|10-chx12-bit
• Number Of Timers: 3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

13.0
The input capture module is useful in applications
requiring frequency (period) and pulse measurement.
The dsPIC33FJ32GP202/204 and dsPIC33FJ16GP304
devices support up to eight input capture channels.
The input capture module captures the 16-bit value of
the selected Time Base register when an event occurs
at the ICx pin. The events that cause a capture event
are listed below in three categories:
FIGURE 13-1:
 2009 Microchip Technology Inc.
Note 1: This data sheet summarizes the features
Note: An ‘x’ in a signal, register or bit name denotes the number of the capture channel.
ICx Pin
2: Some registers and associated bits
INPUT CAPTURE
of
dsPIC33FJ16GP304 family of devices. It
is not intended to be a comprehensive
reference source. To complement the
information in this data sheet, refer to
Section 12. “Input Capture” (DS70198)
of the “dsPIC33F/PIC24H Family Refer-
ence Manual”, which is available from the
Microchip website (www.microchip.com).
described in this section may not be avail-
able on all devices. Refer to Section 4.0
“Memory Organization” in this data
sheet for device-specific register and bit
information.
dsPIC33FJ32GP202/204 and dsPIC33FJ16GP304
Prescaler
the
(1, 4, 16)
Counter
3
dsPIC33FJ32GP202/204 and
INPUT CAPTURE BLOCK DIAGRAM
System Bus
ICxCON
ICM<2:0> (ICxCON<2:0>)
ICOV, ICBNE (ICxCON<4:3>)
Mode Select
Edge Detection Logic
Clock Synchronizer
ICxI<1:0>
and
Preliminary
(in IFSn Register)
Set Flag ICxIF
Interrupt
Logic
• Simple Capture Event modes:
• Capture timer value on every edge (rising and
• Prescaler Capture Event modes:
Each input capture channel can select one of two
16-bit timers (Timer2 or Timer3) for the time base.
The selected timer can use either an internal or
external clock.
Other operational features include:
• Device wake-up from capture pin during CPU
• Interrupt on input capture event
• 4-word FIFO buffer for capture values
• Use of input capture to provide additional sources
- Capture timer value on every falling edge of
- Capture timer value on every rising edge of
falling).
- Capture timer value on every 4th rising edge
Sleep and Idle modes
- Interrupt optionally generated after 1, 2, 3 or
-Capture timer value on every 16th rising
input at ICx pin
input at ICx pin
of input at ICx pin
4 buffer locations are filled
edge of input at ICx pin
FIFO
Logic
R/W
From 16-bit Timers
TMR2 TMR3
1
ICxBUF
16
0
DS70290F-page 143
16
ICTMR
(ICxCON<7>)