PIC18F87J10-I/PT Microchip Technology, PIC18F87J10-I/PT Datasheet - Page 286
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PIC18F87J10-I/PT
Manufacturer Part Number
PIC18F87J10-I/PT
Description
IC PIC MCU FLASH 64KX16 80TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F63J11-IPT.pdf
(36 pages)
3.PIC18F85J10-IPT.pdf
(410 pages)
4.PIC18F85J10-IPT.pdf
(10 pages)
5.PIC18F85J10-IPT.pdf
(10 pages)
6.PIC18F85J10-IPT.pdf
(8 pages)
7.PIC18F66J15-IPT.pdf
(400 pages)
Specifications of PIC18F87J10-I/PT
Program Memory Type
FLASH
Program Memory Size
128KB (64K x 16)
Package / Case
80-TFQFP
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
66
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 15x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3936 B
Interface Type
SPI/I2C/MSSP/EUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
66
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM183022, DV164136, DM183032, DM164120-5
Minimum Operating Temperature
- 40 C
On-chip Adc
15-ch x 10-bit
Package
80TQFP
Device Core
PIC
Family Name
PIC18
Maximum Speed
40 MHz
Operating Supply Voltage
2.5|3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
MA180015 - MODULE PLUG-IN 18F87J10 FOR HPCAC162062 - HEADER INTRFC MPLAB ICD2 64/80PAC164328 - MODULE SKT FOR 80TQFP
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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- PIC16F616T-ISL PDF datasheet
- PIC18F63J11-IPT PDF datasheet #2
- PIC18F85J10-IPT PDF datasheet #3
- PIC18F85J10-IPT PDF datasheet #4
- PIC18F85J10-IPT PDF datasheet #5
- PIC18F85J10-IPT PDF datasheet #6
- PIC18F66J15-IPT PDF datasheet #7
- Current page: 286 of 400
- Download datasheet (7Mb)
PIC18F87J10
23.3
All of the PIC18F87J10 family devices power their core
digital logic at a nominal 2.5V. For designs that are
required to operate at a higher typical voltage, such as
3.3V, all devices in the PIC18F87J10 family incorporate
an on-chip regulator that allows the device to run its
core logic from V
The regulator is controlled by the ENVREG pin. Tying
V
vides power to the core from the other V
the regulator is enabled, a low-ESR filter capacitor
must be connected to the V
(Figure 23-2). This helps to maintain the stability of the
regulator. The recommended value for the filter capac-
itor is provided in Section 26.3 “DC Characteristics:
PIC18F87J10 Family (Industrial)”.
If ENVREG is tied to V
this case, separate power for the core logic at a nomi-
nal 2.5V must be supplied to the device on the
V
levels, typically 3.3V. Alternatively, the V
and V
nominal voltage. Refer to Figure 23-2 for possible
configurations.
23.3.1
When the on-chip regulator is enabled, PIC18F87J10
family devices also have a simple brown-out capability.
If the voltage supplied to the regulator is inadequate to
maintain a regulated level, the regulator Reset circuitry
will generate a BOR Reset. This event is captured by
the BOR flag bit (RCON<0>).
The operation of the BOR is described in more detail in
Section 4.4
Section 4.4.1 “Detecting BOR”. The brown-out voltage
levels are specific in Section 26.1 “DC Characteristics:
Supply Voltage, PIC18F87J10 Family (Industrial)”.
23.3.2
The on-chip regulator is designed to meet the power-up
requirements for the device. If the application does not
use the regulator, then strict power-up conditions must
be adhered to. While powering up, V
never exceed V
DS39663D-page 284
DD
DDCORE
to the pin enables the regulator, which in turn, pro-
DD
On-Chip Voltage Regulator
pins can be tied together to operate at a lower
/V
CAP
ON-CHIP REGULATOR AND BOR
POWER-UP REQUIREMENTS
“Brown-out
DD
pin to run the I/O pins at higher voltage
DD
by 0.3 volts.
.
SS
, the regulator is disabled. In
Reset
DDCORE
(BOR)”
DD
DDCORE
DDCORE
pins. When
/V
CAP
/V
must
CAP
and
Preliminary
pin
FIGURE 23-2:
Note 1:
Regulator Enabled (ENVREG tied to V
Regulator Disabled (ENVREG tied to ground):
Regulator Disabled (V
2.5V
2.5V
C
(1)
(1)
F
3.3V
These are typical operating voltages. Refer
to Section 26.1 “DC Characteristics:
Supply Voltage” for the full operating
ranges of V
3.3V
(1)
V
ENVREG
V
V
CONNECTIONS FOR THE
ON-CHIP REGULATOR
DD
DDCORE
SS
DD
© 2006 Microchip Technology Inc.
DD
PIC18FXXJ10/XXJ15
V
ENVREG
V
V
V
ENVREG
V
V
DD
DDCORE
SS
and V
DD
DDCORE
SS
tied to V
PIC18FXXJ10/XXJ15
PIC18FXXJ10/XXJ15
/V
DDCORE
CAP
/V
/V
DDCORE
CAP
CAP
.
DD
):
):
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