PIC16F72-I/SP Microchip Technology, PIC16F72-I/SP Datasheet - Page 487

IC PIC MCU FLASH 2KX14 28DIP

PIC16F72-I/SP

Manufacturer Part Number
PIC16F72-I/SP
Description
IC PIC MCU FLASH 2KX14 28DIP
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F72-I/SP

Program Memory Type
FLASH
Program Memory Size
3.5KB (2K x 14)
Package / Case
28-DIP (0.300", 7.62mm)
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 5x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
128 B
Interface Type
I2C, SPI, SSP
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
22
Number Of Timers
3
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
ICE2000, DM163022
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 5 Channel
Data Rom Size
8 B
Height
3.3 mm
Length
34.67 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2 V
Width
7.24 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Section 26. Watchdog Timer and Sleep Mode
26.2
1997 Microchip Technology Inc.
Control Register
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2:0
The OPTION_REG register is a readable and writable register which contains various control bits
to configure the TMR0 prescaler/WDT postscaler, the External INT Interrupt, TMR0, and the
weak pull-ups on PORTB.
Register 26-1: OPTION_REG Register
bit 7
RBPU
1 = Weak pull-ups are disabled
0 = Weak pull-ups are enabled by individual port latch values
INTEDG: Interrupt Edge Select bit
1 = Interrupt on rising edge of INT pin
0 = Interrupt on falling edge of INT pin
T0CS: TMR0 Clock Source Select bit
1 = Transition on T0CKI pin
0 = Internal instruction cycle clock (CLKOUT)
T0SE: TMR0 Source Edge Select bit
1 = Increment on high-to-low transition on T0CKI pin
0 = Increment on low-to-high transition on T0CKI pin
PSA: Prescaler Assignment bit
1 = Prescaler is assigned to the WDT
0 = Prescaler is assigned to the Timer0 module
PS2:PS0: TMR0 Prescaler/WDT Postscaler Rate Select bits
Bit Value
Legend
R = Readable bit
U = Unimplemented bit, read as ‘0’
RBPU
R/W-1
Note:
Note 1: Some devices call this bit GPPU. Devices that have the RBPU bit, have the weak
000
001
010
011
100
101
110
111
(1)
(1)
: Weak Pull-up Enable bit
To achieve a 1:1 prescaler assignment for the TMR0 register, assign the prescaler
to the Watchdog Timer.
TMR0 Rate
pull-ups on PORTB, while devices that have the GPPU have the weak pull-ups on
the GP Port.
INTEDG
1 : 2
1 : 4
1 : 8
1 : 16
1 : 32
1 : 64
1 : 128
1 : 256
R/W-1
WDT Rate
W = Writable bit
1 : 1
1 : 2
1 : 4
1 : 8
1 : 16
1 : 32
1 : 64
1 : 128
R/W-1
T0CS
R/W-1
T0SE
- n = Value at POR reset
R/W-1
PSA
R/W-1
PS2
R/W-1
PS1
DS31026A-page 26-3
bit 0
R/W-1
PS0
26

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