PIC12C509A-04/SM Microchip Technology, PIC12C509A-04/SM Datasheet - Page 45

• Manufacturer Part Number: PIC12C509A-04/SM
• Description: IC MCU OTP 1KX12 8-SOIJ
• Manufacturer: Microchip Technology
• Series: PIC® 12Cr

Specifications of PIC12C509A-04/SM

• Core Size: 8-Bit
• Program Memory Size: 1.5KB (1K x 12)
• Core Processor: PIC
• Speed: 4MHz
• Peripherals: POR, WDT
• Number Of I /o: 5
• Program Memory Type: OTP
• Ram Size: 41 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
• Controller Family/series: PIC12
• No. Of I/o's: 6
• Ram Memory Size: 41Byte
• Cpu Speed: 4MHz
• No. Of Timers: 1
• Digital Ic Case Style: SOIC
• Processor Series: PIC12C
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 41 B
• Maximum Clock Frequency: 4 MHz
• Number Of Programmable I/os: 5
• Number Of Timers: 8
• Operating Supply Voltage: 2.5 V to 5.5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: DVMCPA, ICE2000
• Minimum Operating Temperature: 0 C
• Package: 8SOIJ
• Device Core: PIC
• Family Name: PIC12
• Maximum Speed: 4 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT08SO-1 - SOCKET TRANSITION 8SOIC 150/208AC164312 - MODULE SKT FOR PM3 16SOICISPICR1 - ADAPTER IN-CIRCUIT PROGRAMMING309-1048 - ADAPTER 8-SOIC TO 8-DIP309-1047 - ADAPTER 8-SOIC TO 8-DIPAC124001 - MODULE SKT PROMATEII 8DIP/SOIC
• Eeprom Size: -
• Data Converters: -
• Connectivity: -
• Lead Free Status / Rohs Status: Details

8.9
A device may be powered down (SLEEP) and later
powered up (Wake-up from SLEEP).
8.9.1
The Power-Down mode is entered by executing a
SLEEP instruction.
If enabled, the Watchdog Timer will be cleared but
keeps running, the TO bit (STATUS<4>) is set, the PD
bit (STATUS<3>) is cleared and the oscillator driver is
turned off. The I/O ports maintain the status they had
before the SLEEP instruction was executed (driving
high, driving low, or hi-impedance).
It should be noted that a RESET generated by a WDT
time-out does not drive the MCLR pin low.
For lowest current consumption while powered down,
the T0CKI input should be at V
MCLR/V
MCLR is enabled.
8.9.2
The device can wake-up from SLEEP through one of
the following events:
1.
2.
3.
These events cause a device reset. The TO, PD, and
GPWUF bits can be used to determine the cause of
device reset. The TO bit is cleared if a WDT time-out
occurred (and caused wake-up). The PD bit, which is
set on power-up, is cleared when SLEEP is invoked.
The GPWUF bit indicates a change in state while in
SLEEP at pins GP0, GP1, or GP3 (since the last time
there was a file or bit operation on GP port).
The WDT is cleared when the device wakes from
sleep, regardless of the wake-up source.
Caution: Right before entering SLEEP, read the
1999 Microchip Technology Inc.
An external reset input on GP3/MCLR/V
when configured as MCLR.
A Watchdog Timer time-out reset (if WDT was
enabled).
A change on input pin GP0, GP1, or GP3/
MCLR/V
enabled.
PP
Power-Down Mode (SLEEP)
SLEEP
WAKE-UP FROM SLEEP
input pins. When in SLEEP, wake up
occurs when the values at the pins change
from the state they were in at the last
reading. If a wake-up on change occurs
and
reentering SLEEP, a wake up will occur
immediately even if no pins change while
in SLEEP mode.
pin must be at a logic high level (V
PP
the
when wake-up on change is
pins
are
DD
or V
not
SS
read
and the GP3/
PP
IHMC
before
pin,
) if
8.10
If the code protection bit has not been programmed,
the on-chip program memory can be read out for
verification purposes.
The first 64 locations can be read by the PIC12C5XX
regardless of the code protection bit setting.
The last memory location cannot be read if code pro-
tection is enabled on the PIC12C508/509.
The last memory location can be read regardless of the
code protection bit setting on the PIC12C508A/509A/
CR509A/CE518/CE519.
8.11
Four memory locations are designated as ID locations
where the user can store checksum or other code-
identification numbers. These locations are not
accessible during normal execution but are readable
and writable during program/verify.
Use only the lower 4 bits of the ID locations and
always program the upper 8 bits as ’0’s.
Program Verification/Code Protection
ID Locations
PIC12C5XX
DS40139E-page 45