PIC12C509A-04/SM Microchip Technology, PIC12C509A-04/SM Datasheet - Page 22

• Manufacturer Part Number: PIC12C509A-04/SM
• Description: IC MCU OTP 1KX12 8-SOIJ
• Manufacturer: Microchip Technology
• Series: PIC® 12Cr

Specifications of PIC12C509A-04/SM

• Core Size: 8-Bit
• Program Memory Size: 1.5KB (1K x 12)
• Core Processor: PIC
• Speed: 4MHz
• Peripherals: POR, WDT
• Number Of I /o: 5
• Program Memory Type: OTP
• Ram Size: 41 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
• Controller Family/series: PIC12
• No. Of I/o's: 6
• Ram Memory Size: 41Byte
• Cpu Speed: 4MHz
• No. Of Timers: 1
• Digital Ic Case Style: SOIC
• Processor Series: PIC12C
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 41 B
• Maximum Clock Frequency: 4 MHz
• Number Of Programmable I/os: 5
• Number Of Timers: 8
• Operating Supply Voltage: 2.5 V to 5.5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: DVMCPA, ICE2000
• Minimum Operating Temperature: 0 C
• Package: 8SOIJ
• Device Core: PIC
• Family Name: PIC12
• Maximum Speed: 4 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT08SO-1 - SOCKET TRANSITION 8SOIC 150/208AC164312 - MODULE SKT FOR PM3 16SOICISPICR1 - ADAPTER IN-CIRCUIT PROGRAMMING309-1048 - ADAPTER 8-SOIC TO 8-DIP309-1047 - ADAPTER 8-SOIC TO 8-DIPAC124001 - MODULE SKT PROMATEII 8DIP/SOIC
• Eeprom Size: -
• Data Converters: -
• Connectivity: -
• Lead Free Status / Rohs Status: Details

PIC12C5XX
TABLE 5-1:
5.4
5.4.1
Some instructions operate internally as read followed
by write operations. The BCF and BSF instructions, for
example, read the entire port into the CPU, execute
the bit operation and re-write the result. Caution must
be used when these instructions are applied to a port
where one or more pins are used as input/outputs. For
example, a BSF operation on bit5 of GPIO will cause
all eight bits of GPIO to be read into the CPU, bit5 to
be set and the GPIO value to be written to the output
latches. If another bit of GPIO is used as a bi-
directional I/O pin (say bit0) and it is defined as an
input at this time, the input signal present on the pin
itself would be read into the CPU and rewritten to the
data latch of this particular pin, overwriting the
previous content. As long as the pin stays in the input
mode, no problem occurs. However, if bit0 is switched
into output mode later on, the content of the data latch
may now be unknown.
Example 5-1 shows the effect of two sequential read-
modify-write instructions (e.g., BCF, BSF, etc.) on an
I/O port.
A pin actively outputting a high or a low should not be
driven from external devices at the same time in order
to change the level on this pin (“wired-or”, “wired-
and”). The resulting high output currents may damage
the chip.
DS40139E-page 22
Address
N/A
N/A
03H
06h
06h
Legend: Shaded cells not used by Port Registers, read as ‘0’, — = unimplemented, read as '0', x = unknown, u = unchanged,
Note 1:
I/O Programming Considerations
BI-DIRECTIONAL I/O PORTS
q = see tables in Section 8.7 for possible values.
If reset was due to wake-up on change, then bit 7 = 1. All other resets will cause bit 7 = 0.
TRIS
STATUS
GPIO
(PIC12C508/
PIC12C509/
PIC12C508A/
PIC12C509A/
PIC12CR509A)
GPIO
(PIC12CE518/
PIC12CE519)
OPTION
Name
SUMMARY OF PORT REGISTERS
GPWUF
GPWU
Bit 7
SCL
—
—
GPPU
Bit 6
SDA
—
—
—
T0CS
Bit 5
GP5
PAO
GP5
T0SE
Bit 4
GP4
GP4
TO
Bit 3
PSA
GP3
GP3
PD
EXAMPLE 5-1:
;Initial GPIO Settings
; GPIO<5:3> Inputs
; GPIO<2:0> Outputs
;
;
;
;
;Note that the user may have expected the pin
;values to be --00 pppp. The 2nd BCF caused
;GP5 to be latched as the pin value (High).
5.4.2
The actual write to an I/O port happens at the end of
an instruction cycle, whereas for reading, the data
must be valid at the beginning of the instruction cycle
(Figure 5-2). Therefore, care must be exercised if a
write followed by a read operation is carried out on the
same I/O port. The sequence of instructions should
allow the pin voltage to stabilize (load dependent)
before the next instruction, which causes that file to be
read into the CPU, is executed. Otherwise, the
previous state of that pin may be read into the CPU
rather than the new state. When in doubt, it is better to
separate these instructions with a NOP or another
instruction not accessing this I/O port.
BCF
BCF
MOVLW 007h
TRIS
Bit 2
GP2
GP2
PS2
Z
SUCCESSIVE OPERATIONS ON I/O
PORTS
GPIO, 5
GPIO, 4
GPIO
Bit 1
GP1
GP1
PS1
DC
Bit 0
GP0
GP0
PS0
C
READ-MODIFY-WRITE
INSTRUCTIONS ON AN
I/O PORT
;--01 -ppp
;--10 -ppp
;--10 -ppp
;
GPIO latch
----------
--xx xxxx
11xx xxxx
--11 1111
1111 1111
0001 1xxx
Power-On
1999 Microchip Technology Inc.
Value on
Reset
--11 pppp
--11 pppp
--11 pppp
All Other Resets
GPIO pins
----------
q00q quuu
--uu uuuu
11uu uuuu
--11 1111
1111 1111
Value on
(1)