PIC12C509A-04/SM Microchip Technology, PIC12C509A-04/SM Datasheet - Page 29

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PIC12C509A-04/SM

Manufacturer Part Number
PIC12C509A-04/SM
Description
IC MCU OTP 1KX12 8-SOIJ
Manufacturer
Microchip Technology
Series
PIC® 12Cr

Specifications of PIC12C509A-04/SM

Core Size
8-Bit
Program Memory Size
1.5KB (1K x 12)
Core Processor
PIC
Speed
4MHz
Peripherals
POR, WDT
Number Of I /o
5
Program Memory Type
OTP
Ram Size
41 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
Controller Family/series
PIC12
No. Of I/o's
6
Ram Memory Size
41Byte
Cpu Speed
4MHz
No. Of Timers
1
Digital Ic Case Style
SOIC
Processor Series
PIC12C
Core
PIC
Data Bus Width
8 bit
Data Ram Size
41 B
Maximum Clock Frequency
4 MHz
Number Of Programmable I/os
5
Number Of Timers
8
Operating Supply Voltage
2.5 V to 5.5 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
DVMCPA, ICE2000
Minimum Operating Temperature
0 C
Package
8SOIJ
Device Core
PIC
Family Name
PIC12
Maximum Speed
4 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT08SO-1 - SOCKET TRANSITION 8SOIC 150/208AC164312 - MODULE SKT FOR PM3 16SOICISPICR1 - ADAPTER IN-CIRCUIT PROGRAMMING309-1048 - ADAPTER 8-SOIC TO 8-DIP309-1047 - ADAPTER 8-SOIC TO 8-DIPAC124001 - MODULE SKT PROMATEII 8DIP/SOIC
Eeprom Size
-
Data Converters
-
Connectivity
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC12C509A-04/SM
Manufacturer:
MIC
Quantity:
1 485
Part Number:
PIC12C509A-04/SM
Manufacturer:
MIC
Quantity:
20 000
7.0
This
PIC12CE519 only.
The PIC12CE518 and PIC12CE519 each have 16
bytes of EEPROM data memory. The EEPROM mem-
ory has an endurance of 1,000,000 erase/write cycles
and a data retention of greater than 40 years. The
EEPROM data memory supports a bi-directional 2-wire
bus and data transmission protocol. These two-wires
are serial data (SDA) and serial clock (SCL), that are
mapped to bit6 and bit7, respectively, of the GPIO reg-
ister (SFR 06h). Unlike the GP0-GP5 that are con-
nected to the I/O pins, SDA and SCL are only
connected to the internal EEPROM peripheral. For
most applications, all that is required is calls to the fol-
lowing functions:
; Byte_Write: Byte write routine
;
;
;
;
; Read_Current: Read EEPROM at address
currently held by EE device.
;
;
;
;
; Read_Random: Read EEPROM byte at supplied
address
;
;
;
The code for these functions is available on our website
www.microchip.com. The code will be accessed by
either including the source code FL51XINC.ASM or by
linking FLASH5IX.ASM.
It is very important to check the return codes when
using these calls, and retry the operation if unsuccess-
ful. Unsuccessful return codes occur when the EE data
memory is busy with the previous write, which can take
up to 4 mS.
7.0.1
SDA is a bi-directional pin used to transfer addresses
and data into and data out of the device.
For normal data transfer SDA is allowed to change only
during SCL low. Changes during SCL high are
reserved for indicating the START and STOP condi-
tions.
The EEPROM interface is a 2-wire bus protocol con-
sisting of data (SDA) and a clock (SCL). Although
these lines are mapped into the GPIO register, they are
not accessible as external pins; only to the internal
EEPROM peripheral. SDA and SCL operation is also
slightly different than GPO-GP5 as listed below.
1999 Microchip Technology Inc.
section
EEPROM PERIPHERAL
OPERATION
Inputs: EEPROM Address
Outputs:
Inputs: NONE
Outputs:
Inputs: EEPROM Address
Outputs:
SERIAL DATA
EEPROM Data
applies
Return 01 in W if OK, else
return 00 in W
EEPROM Data
Return 01 in W if OK, else
return 00 in W
EEPROM Data
Return 01 in W if OK,
else return 00 in W
to
PIC12CE518
EEADDR
EEDATA
EEDATA
EEADDR
EEDATA
and
Namely, to avoid code overhead in modifying the TRIS
register, both SDA and SCL are always outputs. To
read data from the EEPROM peripheral requires out-
putting a ‘1’ on SDA placing it in high-Z state, where
only the internal 100K pull-up is active on the SDA line.
The following example requires:
• Code Space: 77 words
• RAM Space: 5 bytes (4 are overlayable)
• Stack Levels:1 (The call to the function itself. The
• Timing:
• IO Pins: 0 (No external IO pins are used)
This code must reside in the lower half of a page. The
code achieves it’s small size without additional calls
through the use of a sequencing table. The table is a
list of procedures that must be called in order. The
table uses an ADDWF PCL,F instruction, effectively a
computed goto, to sequence to the next procedure.
However the ADDWF PCL,F instruction yields an 8 bit
address, forcing the code to reside in the first 256
addresses of a page.
functions do not call any lower level functions.)
- WRITE_BYTE takes 328 cycles
- READ_CURRENT takes 212 cycles
- READ_RANDOM takes 416 cycles.
SDA:
SCL:
Built-in 100K (typical) pull-up to VDD
Open-drain (pull-down only)
Always an output
Outputs a ‘1’ on reset
Full CMOS output
Always an output
Outputs a ‘1’ on reset
PIC12C5XX
DS40139E-page 29

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