C8051F326-TB Silicon Laboratories Inc, C8051F326-TB Datasheet - Page 132

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C8051F326-TB

Manufacturer Part Number
C8051F326-TB
Description
BOARD PROTOTYPING W/C8051F326
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheet

Specifications of C8051F326-TB

Contents
Board
Processor To Be Evaluated
C8051F326/F327
Interface Type
USB
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
C8051F326
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
C8051F326/7
132
Bit7:
Bit6:
Bits5–4: T1M1-T1M0: Timer 1 Mode Select.
Bit3:
Bit2:
Bits1–0: T0M1-T0M0: Timer 0 Mode Select.
GATE1
R/W
Bit7
GATE1: Timer 1 Gate Control.
0: Timer 1 enabled when TR1 = 1 irrespective of /INT1 logic level. /INT1 is activated when
the internal oscillator resumes from a suspended state.
1: Timer 1 enabled only when TR1 = 1 AND /INT1 is active. /INT1 is activated every 2 low
frequency oscillator clock cycles. This is a rate of 40kHz.
Reserved. Read = 0b. Must write 0b.
These bits select the Timer 1 operation mode.
GATE0: Timer 0 Gate Control.
0: Timer 0 enabled when TR0 = 1 irrespective of /INT0 logic level. /INT0 input pin is P0.0.
1: Timer 0 enabled only when TR0 = 1 AND /INT0 is active. /INT0 input pin is P0.2.
Reserved. Read = 0b. Must write 0b.
These bits select the Timer 0 operation mode.
Reserved
T1M1
T0M1
0
0
1
1
0
0
1
1
R/W
Bit6
T1M0
T0M0
0
1
0
1
0
1
0
1
SFR Definition 14.2. TMOD: Timer Mode
T1M1
R/W
Bit5
Mode 2: 8-bit timer with auto-reload
Mode 2: 8-bit timer with auto-reload
T1M0
R/W
Bit4
Mode 3: Timer 1 inactive
Mode 3: Two 8-bit timers
Mode 0: 13-bit timer
Mode 1: 16-bit timer
Mode 0: 13-bit timer
Mode 1: 16-bit timer
Rev. 1.1
GATE0
Mode
Mode
R/W
Bit3
Reserved
R/W
Bit2
T0M1
R/W
Bit1
T0M0
R/W
Bit0
SFR Address:
00000000
Reset Value
0x89

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