C8051F326-TB Silicon Laboratories Inc, C8051F326-TB Datasheet - Page 111

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C8051F326-TB

Manufacturer Part Number
C8051F326-TB
Description
BOARD PROTOTYPING W/C8051F326
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheet

Specifications of C8051F326-TB

Contents
Board
Processor To Be Evaluated
C8051F326/F327
Interface Type
USB
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
C8051F326
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Bit7:
Bit6:
Bit5–4:
Bit3:
Bits2-0:
USB Register Definition 12.20. EINCSRH: USB0 IN Endpoint Control High Byte
DBIEN
R/W
Bit7
DBIEN: IN Endpoint Double-buffer Enable.
0: Double-buffering disabled for the selected IN endpoint.
1: Double-buffering enabled for the selected IN endpoint.
ISO: Isochronous Transfer Enable.
This bit enables/disables isochronous transfers on the current endpoint.
0: Endpoint configured for bulk/interrupt transfers.
1: Endpoint configured for isochronous transfers.
Unused. Read = 00b. Write = don’t care.
FCDT: Force Data Toggle.
0: Endpoint data toggle switches only when an ACK is received following a data packet
transmission.
1: Endpoint data toggle forced to switch after every data packet is transmitted, regardless of
ACK reception.
Unused. Read = 000b. Write = don’t care.
ISO
R/W
Bit6
Bit5
R
Bit4
R
Rev. 1.1
FCDT
R/W
Bit3
Bit2
R
Bit1
R
C8051F326/7
Bit0
R
USB Address:
00000000
Reset Value
0x12
111

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