STEVAL-ISB005V1 STMicroelectronics, STEVAL-ISB005V1 Datasheet - Page 97

BOARD EVAL CHARGER ST7260/L6924D

STEVAL-ISB005V1

Manufacturer Part Number
STEVAL-ISB005V1
Description
BOARD EVAL CHARGER ST7260/L6924D
Manufacturer
STMicroelectronics
Type
Battery Managementr
Datasheets

Specifications of STEVAL-ISB005V1

Main Purpose
Power Management, Battery Charger
Embedded
Yes, MCU, 8-Bit
Utilized Ic / Part
L6924, ST72F63BK6M1
Primary Attributes
1 Cell- Li-Ion / Li-Pol, 5 V (USB Input)
Secondary Attributes
Powered by Wall Adaptor Also, LED Status Indicators
Input Voltage
5 V
Product
Power Management Modules
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
L6924D, ST7260
Other names
497-8428

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
STEVAL-ISB005V1
Manufacturer:
STMicroelectronics
Quantity:
1
ST7260xx
14.4.10
14.5
14.5.1
Table 45.
These bits are written by software. Hardware sets the STAT_RX bits to NAK when a correct
transfer has occurred (CTR=1) related to an OUT or SETUP transaction addressed to this
endpoint, so the software has the time to elaborate the received data before acknowledging
a new transaction.
Bits 3:0 = EA[3:0] Endpoint address.
Software must write in this field the 4-bit address used to identify the transactions directed to
this endpoint. Usually EP1RB contains “0001” and EP2RB contains “0010”.
Endpoint 0 register B (EP0RB)
This register is used for controlling data reception on Endpoint 0. It is also reset by the USB
bus reset.
Bit 7 = Forced by hardware to 1.
Bits 6:4 = Refer to the EPnRB register for a description of these bits.
Bits 3:0 = Forced by hardware to 0.
Programming considerations
The interaction between the USB interface and the application program is described below.
Apart from system reset, action is always initiated by the USB interface, driven by one of the
USB events associated with the Interrupt Status Register (ISTR) bits.
Initializing the registers
At system reset, the software must initialize all registers to enable the USB interface to
properly generate interrupts and DMA requests.
EP0RB
R/W
7
1
STAT_RX1
0
0
1
1
STAT_RX bits
DTOG
R/W
RX
6
STAT
RX1
R/W
5
STAT_RX0
0
1
0
1
STAT
RX0
R/W
4
DISABLED: reception transfers cannot be
executed.
STALL: the endpoint is stalled and all reception
requests result in a STALL handshake.
NAK: the endpoint is naked and all reception
requests result in a NAK handshake.
VALID: this endpoint is enabled for reception.
R/W
3
0
R/W
2
0
Reset value:
Meaning
USB interface (USB)
R/W
1
0
1000 0000 (80h)
R/W
0
0
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