MT8VDDT3264HY-335G3 Micron Technology Inc, MT8VDDT3264HY-335G3 Datasheet - Page 26

• Manufacturer Part Number: MT8VDDT3264HY-335G3
• Description: MODULE DDR SDRAM 256MB 200SODIMM
• Manufacturer: Micron Technology Inc

Specifications of MT8VDDT3264HY-335G3

• Memory Type: DDR SDRAM
• Memory Size: 256MB
• Speed: 333MT/s
• Package / Case: 200-SODIMM
• Main Category: DRAM Module
• Sub-category: DDR SDRAM
• Module Type: 200SODIMM
• Device Core Size: 64b
• Organization: 32Mx64
• Total Density: 256MByte
• Chip Density: 256Mb
• Maximum Clock Rate: 333MHz
• Operating Supply Voltage (typ): 2.5V
• Operating Current: 1.4A
• Number Of Elements: 8
• Operating Supply Voltage (max): 2.7V
• Operating Supply Voltage (min): 2.3V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Pin Count: 200
• Mounting: Socket
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 21: Serial Presence-Detect Matrix
“1”/“0”: Serial Data, “driven to HIGH”/“driven to LOW”; notes appear following matrix
pdf: 09005aef8092973f, source: 09005aef80921669
DD8C16_32_64x64HG.fm - Rev. B 9/04 EN
BYTE
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
0
1
2
3
4
5
6
7
8
9
Number of SPD Bytes Used by Micron
Total Number of Bytes in SPD Device
Fundamental Memory Type
Number of Row Addresses on
Assembly
Number of Column Addresses on
Assembly
Number of Physical Ranks on DIMM
Module Data Width
Module Data Width (Continued)
Module Voltage Interface Levels
SDRAM Cycle Time,
= 2.5 (see note 1)
SDRAM Access From Clock,
Latency = 2.5
Module Configuration Type
Refresh Rate/Type
SDRAM Device Width (Primary DDR
SDRAM)
Error-checking DDR SDRAM Data
Width
Minimum Clock Delay, Back-to-Back
Random Column Access
Burst Lengths Supported
Number of Banks on DDR SDRAM
Device
CAS Latencies Supported
CS Latency
WE Latency
SDRAM Module Attributes
SDRAM Device Attributes: General
SDRAM Cycle Time,
= 2
SDRAM Access from Clock,
Latency = 2
SDRAM Cycle Time,
= 1.5
SDRAM Access from CK ,
Latency = 1.5
Minimum Row Precharge Time,
(see note 4)
Minimum Row Active to Row Active,
t
Minimum RAS# to CAS# Delay,
(see note 4)
RRD
DESCRIPTION
t
t
t
CK, CAS Latency
CK, CAS Latency
CK, CAS Latency
t
AC, CAS
t
t
AC, CAS
AC, CAS
t
RCD
t
RP
Unbuffered/Diff. Clock
0.75ns (-262/-26A/-265)
0.75ns (-262/-26A/-265)
7.5ns (-335/-262/-26A)
15ns (-262/-26A/-265)
ENTRY (VERSION)
Fast/Concurrent AP
15.62µs, 7.8µs/SELF
20ns (-26A/-265)
20ns (-26A/-265)
7ns (-262/-26A)
DDR SDRAM
7.5ns (-265)
0.7ns (-335)
0.7ns (-335)
10ns (-265)
18ns (-335)
15ns (-262)
12ns (-335)
18ns (-335)
15ns (-262)
SSTL 2.5V
6ns(-335)
1 clock
12, 13
10, 11
2, 4, 8
2, 2.5
None
None
128
256
N/A
N/A
64
1
0
8
4
0
1
26
128MB, 256MB, 512MB (x64, SR)
Micron Technology, Inc., reserves the right to change products or specifications without notice.
MT8VDDT1664H MT8VDDT3264H MT8VDDT6464H
0C
0A
0C
A0
3C
3C
3C
80
08
07
01
40
00
04
60
70
75
70
75
00
80
08
00
01
0E
04
01
02
20
C0
75
70
75
00
00
48
50
30
48
50
200-PIN DDR SODIMM
©2004 Micron Technology, Inc. All rights reserved.
0D
0A
A0
0C
C0
3C
3C
3C
80
08
07
01
40
00
04
60
70
75
70
75
00
82
08
00
01
0E
04
01
02
20
75
70
75
00
00
48
50
30
48
50
0D
A0
80
08
0B
01
40
00
04
60
70
75
70
75
00
82
08
00
01
0E
04
0C
01
02
C0
75
70
75
00
00
48
3C
50
30
3C
48
3C
50
07
20