C8051F987-GMR Silicon Labs, C8051F987-GMR Datasheet - Page 77

• Manufacturer Part Number: C8051F987-GMR
• Description: 8-bit Microcontrollers - MCU 8kB 512B RAM
• Manufacturer: Silicon Labs

Specifications of C8051F987-GMR

• Rohs: yes
• Core: 8051
• Processor Series: C8051
• Data Bus Width: 8 bit

SFR Definition 5.6. ADC0H: ADC0 Data Word High Byte
SFR Page = 0x0; SFR Address = 0xBE
SFR Definition 5.7. ADC0L: ADC0 Data Word Low Byte
SFR Page = 0x0; SFR Address = 0xBD;
Note: If Accumulator shifting is enabled, the most significant bits of the value read will be zeros. This register
Note: If Accumulator shifting is enabled, the most significant bits of the value read will be the least significant bits of
Name
Reset
Name
Reset
Type
Bit
7:0
Type
Bit
7:0
Bit
Bit
should not be written when the SYNC bit is set to 1.
the accumulator high byte. This register should not be written when the SYNC bit is set to 1.
ADC0[15:8] ADC0 Data Word High
ADC0[7:0]
Name
Name
7
0
7
0
Byte.
ADC0 Data Word Low
Byte.
6
0
6
0
Description
Description
5
0
5
0
Rev. 1.1
Most Significant Byte of the
16-bit ADC0 Accumulator
formatted according to the
settings in AD0SJST[2:0].
Least Significant Byte of the
16-bit ADC0 Accumulator
formatted according to the
settings in AD0SJST[2:0].
4
0
4
0
ADC0[15:8]
ADC0[7:0]
R/W
R/W
C8051F99x-C8051F98x
Read
Read
3
0
3
0
2
0
2
0
Set the most significant
byte of the 16-bit ADC0
Accumulator to the value
written.
Set the least significant
byte of the 16-bit ADC0
Accumulator to the value
written.
1
0
1
0
Write
Write
0
0
0
0
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