C8051F987-GMR Silicon Labs, C8051F987-GMR Datasheet - Page 220

• Manufacturer Part Number: C8051F987-GMR
• Description: 8-bit Microcontrollers - MCU 8kB 512B RAM
• Manufacturer: Silicon Labs

Specifications of C8051F987-GMR

• Rohs: yes
• Core: 8051
• Processor Series: C8051
• Data Bus Width: 8 bit

C8051F99x-C8051F98x
SFR Definition 21.1. XBR0: Port I/O Crossbar Register 0
SFR Page = 0x0; SFR Address = 0xE1
220
Note: SPI0 can be assigned either 3 or 4 Port I/O pins.
Name
Reset
Type
7:6
Bit
Bit
5
4
3
2
1
0
SYSCKE SYSCLK Output Enable.
Unused
CP0AE
SMB0E
URT0E
SPI0E
Name
CP0E
R/W
7
0
Read = 00b. Write = Don’t Care.
Comparator0 Asynchronous Output Enable.
0: Asynchronous CP0 output unavailable at Port pin.
1: Asynchronous CP0 output routed to Port pin.
Comparator0 Output Enable.
0: CP1 output unavailable at Port pin.
1: CP1 output routed to Port pin.
0: SYSCLK output unavailable at Port pin.
1: SYSCLK output routed to Port pin.
SMBus I/O Enable.
0: SMBus I/O unavailable at Port pin.
1: SDA and SCL routed to Port pins.
SPI0 I/O Enable.
0: SPI0 I/O unavailable at Port pin.
1: SCK, MISO, and MOSI (for SPI0) routed to Port pins.
UART0 Output Enable.
0: UART I/O unavailable at Port pin.
1: TX0 and RX0 routed to Port pins P0.4 and P0.5.
NSS (for SPI0) routed to Port pin only if SPI0 is configured to 4-wire mode.
R/W
6
0
CP0AE
R/W
5
0
CP0E
R/W
Rev. 1.1
4
0
Function
SYSCKE
R/W
3
0
SMB0E
R/W
2
0
SPI0E
R/W
1
0
URT0E
R/W
0
0