C8051F987-GMR Silicon Labs, C8051F987-GMR Datasheet - Page 134

• Manufacturer Part Number: C8051F987-GMR
• Description: 8-bit Microcontrollers - MCU 8kB 512B RAM
• Manufacturer: Silicon Labs

Specifications of C8051F987-GMR

• Rohs: yes
• Core: 8051
• Processor Series: C8051
• Data Bus Width: 8 bit

C8051F99x-C8051F98x
134
SFRs are listed in alphabetical order. All undefined SFR locations are reserved.
Register
CS0SCAN0
CS0SCAN1
P0MDOUT
P1MDOUT
DEVICEID
IREF0CN
OSCXCN
IREF0CF
CS0MD1
CS0MD2
CS0MD3
P0MASK
P1MASK
CS0THH
CS0THL
OSCICN
P0MDIN
P1MDIN
OSCICL
CS0MX
CS0PM
P0SKIP
CS0DH
CS0SE
CS0SS
IT01CF
P0DRV
P1DRV
CS0DL
FLKEY
P0MAT
P1MAT
FLSCL
FLWR
EIE1
EIE2
EIP1
EIP2
DPH
DPL
P0
P1
IE
IP
Address
0xDD
0xEE
0xED
0xAF
0xAB
0xDE
0xD2
0xD3
0xDE
0xFE
0xFD
0xD6
0xC7
0xD7
0xD4
0xBF
0xCF
0xF3
0xF3
0xE3
0xE6
0xE7
0xF6
0xF7
0xB7
0xB6
0xE5
0xA8
0xB8
0xB9
0xE4
0xB3
0xB2
0xB1
0xF1
0xA4
0x9B
0xF2
0xA5
0x83
0x82
0x80
0x99
0x90
Table 12.3. Special Function Registers (Continued)
SFR Page
0x0
0x0
0x0
0x0
0xF
0x0
0xF
0x0
0x0
0x0
0x0
0x0
0x0
0xF
0x0
0x0
0x0
0x0
0x0
0x0
0xF
0x0
0x0
0x0
0x0
0x0
0xF
0x0
0x0
0x0
0x0
All
All
All
All
All
All
All
All
All
All
All
All
All
CS0 Data High Byte
CS0 Data Low Byte
CS0 Mode1
CS0 Mode 2
CS0 Mode 3
CS0 Mux Channel Select
CS0 Power Management
CS0 Scan Channel Enable 0
CS0 Scan Channel Enable 1
CS0 Auto-Scan End Channel
CS0 Auto-Scan Start Channel
CS0 Comparator Threshold High Byte
CS0 Comparator Threshold Low Byte
Device ID
Data Pointer High
Data Pointer Low
Extended Interrupt Enable 1
Extended Interrupt Enable 2
Extended Interrupt Priority 1
Extended Interrupt Priority 2
Flash Lock And Key
Flash Scale Register
Flash Write Only Register
Interrupt Enable
Interrupt Priority
Current Reference IREF0 Configuration
Current Reference IREF0 Control
INT0/INT1 Configuration
Internal Oscillator Calibration
Internal Oscillator Control
External Oscillator Control
Port 0 Latch
Port 0 Drive Strength
Port 0 Mask
Port 0 Match
Port 0 Input Mode Configuration
Port 0 Output Mode Configuration
Port 0 Skip
Port 1 Latch
Port 1 Drive Strength
Port 1 Mask
Port 1 Match
Port 1 Input Mode Configuration
Port 1 Output Mode Configuration
Rev. 1.1
Description
Page
108
108
112
113
114
117
115
109
109
110
110
153
124
124
143
145
144
146
159
160
160
141
142
148
193
192
194
226
228
223
223
227
227
226
229
231
224
224
230
226
111
111
90
89