C8051F987-GMR Silicon Labs, C8051F987-GMR Datasheet - Page 112

• Manufacturer Part Number: C8051F987-GMR
• Description: 8-bit Microcontrollers - MCU 8kB 512B RAM
• Manufacturer: Silicon Labs

Specifications of C8051F987-GMR

• Rohs: yes
• Core: 8051
• Processor Series: C8051
• Data Bus Width: 8 bit

C8051F99x-C8051F98x
SFR Definition 8.11. CS0MD1: Capacitive Sense Mode 1
SFR Page = 0x0; SFR Address = 0xAF
112
Name
Reset
5:4
2:0
Bit
Type
7
6
3
Bit
CS0CG[2:0]
CS0DR[1:0]
Reserved
Reserved
CS0POL
CS0WOI
Name
R/W
7
0
CS0POL
Must write 0.
CS0 Digital Comparator Polarity Select.
0: The digital comparator generates an interrupt if the conversion is greater than
the threshold.
1: The digital comparator generates an interrupt if the conversion is less than or
equal to the threshold.
CS0 Double Reset Select.
These bits adjust the secondary CS0 reset time. For most touch-sensitive
switches, the default (fastest) value is sufficient. See the discussion in Section
8.13 for more information.
00: No additional time is used for secondary reset.
01: An additional 0.75 µs is used for secondary reset.
10: An additional 1.5 µs is used for secondary reset.
11: An additional 2.25 µs is used for secondary reset.
CS0 Wake on Interrupt Configuration.
0: Wake-up event generated on digital comparator interrupt only.
1: Wake-up event generated on end of scan or digital comparator interrupt.
CS0 Capacitance Gain Select.
These bits select the gain applied to the capacitance measurement. Lower gain
values increase the size of the capacitance that can be measured with the CS0
module. The capacitance gain is equivalent to CS0CG[2:0] + 1.
000: Gain = 1x
001: Gain = 2x
010: Gain = 3x
011:
100: Gain = 5x
101: Gain = 6x
110:
111:
6
0
Gain = 4x
Gain = 7x
Gain = 8x (default)
5
0
CS0DR
Rev. 1.1
4
0
Description
CS0WOI
3
0
R/W
2
1
CS0CG[2:0]
R/W
1
1
R/W
0
1