STA381BWSTR STMicroelectronics, STA381BWSTR Datasheet - Page 89

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STA381BWSTR

Manufacturer Part Number
STA381BWSTR
Description
Audio DSPs Sound Terminal 2.1 High EFF Dig Audio
Manufacturer
STMicroelectronics
Datasheet

Specifications of STA381BWSTR

Product Category
Audio DSPs
Rohs
yes
Operating Supply Voltage
4.5 V to 25.5 V
Operating Temperature Range
0 C to + 150 C
Mounting Style
SMD/SMT
Package / Case
VQFN-48
Snr
100 dB

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STA381BWS
6.28
Table 84.
Short-circuit protection mode registers SHOK (address 0x58)
The following power bridge pins short-circuit protections are implemented in the
STA381BWS:
The protection is enabled when reg. 0x50 bit 0 (SHEN) is set to ‘1’. The protection will check
the short-circuit when the EAPD bit is toggled from ‘0’ to ‘1’ (i.e. the power bridge is switched
on), and only if the test passes (no short), does the power bridge leave the tristate condition.
Register 0x58 (read-only registers) will give more information about the detected short type.
GNDSH equal to ‘0’ means that OUTxx is shorted to ground, while the same value on
VCCSH means that OUTxx is shorted to Vcc, finally OUTSH=’0’ means that OUT1B is
shorted to OUT2A.
To be noted that once the check is performed, and the tristate released, the short protection
is not active anymore until the next EAPD 0->1 toggling which means that shorts that
happened during normal operation cannot be detected.
To be noted that register SHOK is meaningful only after the EAPD bit is set to ‘1’ at least
once.
The short-circuit protections implemented are effective only in BTL configuration, and they
must not be activated if a single-ended application scheme is needed.
Bit
reserved
3
2
1
0
NA
D7
OUTxx vs. GNDx
OUTxx vs. VCCx
OUT1B vs. OUT2A
R/W
R/W
R/W
R/W
R/W
PLL register 0x57 bits
reserved
NA
D6
RST
reserved
NA
D5
BYPSTATE
PDSTATE
Doc ID 018937 Rev 6
OSCOK
LOWCK
Name
reserved
NA
D4
PLL bypass state
PLL PD state
OSCI locked
Clock input low-frequency check
reserved
NA
D3
Register description: New Map
GNDSH
Description
D2
NA
VCCSH
NA
D1
OUTSH
NA
D0
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