STA381BWSTR STMicroelectronics, STA381BWSTR Datasheet - Page 122

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STA381BWSTR

Manufacturer Part Number
STA381BWSTR
Description
Audio DSPs Sound Terminal 2.1 High EFF Dig Audio
Manufacturer
STMicroelectronics
Datasheet

Specifications of STA381BWSTR

Product Category
Audio DSPs
Rohs
yes
Operating Supply Voltage
4.5 V to 25.5 V
Operating Temperature Range
0 C to + 150 C
Mounting Style
SMD/SMT
Package / Case
VQFN-48
Snr
100 dB

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Register description: Sound Terminal compatibility
7.7
7.7.1
122/171
The EAPD register directly disables/enables the internal power circuitry.
When EAPD = 0, the internal power section is placed in a low-power state (disabled). This
register also controls the EAPD/FFX4B output pin when OCFG = 10.
Volume control registers (addr 0x06 - 0x0A)
Mute/line output configuration register
Table 131. Line output configuration
Line output is only active when OCFG = 00. In this case LOC determines the line output
configuration. The source of the line output is always channel 1 and 2 inputs.
Table 132. Mute configuration
Bit
Bit
4
3
2
LOC1
LOC[1:0]
D7
0
00
01
10
11
R/W
R/W
R/W
R/W
R/W
LOC0
D6
0
RST
RST
Line output fixed - no volume, no EQ
Line output variable - CH3 volume effects line output, no EQ
Line output variable with EQ - CH3 volume effects line output
Reserved
0
0
0
Reserved
D5
0
BQBALL
Name
Name
Doc ID 018937 Rev 6
C3M
C2M
BQBALL
D4
0
Global biquad bypass
0: Biquad filters active
1: All the biquad filters are bypassed (pass-through)
Channel 3 mute
0 - No mute condition. It is possible to set the channel
volume
1 - Channel 3 in hardware mute
Channel 2 mute
0 - No mute condition. It is possible to set the channel
volume
1 - Channel 2 in hardware mute
Line output configuration
C3M
D3
0
Description
Description
C2M
D2
0
C1M
D1
0
STA381BWS
MMUTE
D0
0

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