STA381BWSTR STMicroelectronics, STA381BWSTR Datasheet - Page 6

• Manufacturer Part Number: STA381BWSTR
• Description: Audio DSPs Sound Terminal 2.1 High EFF Dig Audio
• Manufacturer: STMicroelectronics

Specifications of STA381BWSTR

• Product Category: Audio DSPs
• Rohs: yes
• Operating Supply Voltage: 4.5 V to 25.5 V
• Operating Temperature Range: 0 C to + 150 C
• Mounting Style: SMD/SMT
• Package / Case: VQFN-48
• Snr: 100 dB

Contents
7
6/171
6.27
6.28
6.29
6.30
6.31
6.32
6.33
6.34
6.35
6.36
6.37
6.38
Register description: Sound Terminal compatibility . . . . . . . . . . . . . 103
7.1
7.2
7.3
7.4
PLL configuration registers
Short-circuit protection mode registers SHOK (address 0x58) . . . . . . . . 89
Extended coefficient range up to -4...4 (address 0x5A) . . . . . . . . . . . . . . 90
Miscellaneous registers (address 0x5C, 0x5D) . . . . . . . . . . . . . . . . . . . . 91
Bad PWM detection registers (address 0x5E, 0x5F, 0x60) . . . . . . . . . . . 93
Enhanced zero-detect mute and input level measurement
F3XCFG (address 0x69; 0x6A) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97
MISC4 (address 0x7E) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101
(address 0x52; 0x53; 0x54; 0x55; 0x56; 0x57) . . . . . . . . . . . . . . . . . . . . 87
6.30.1
6.30.2
6.30.3
6.30.4
6.30.5
6.30.6
(address 0x61-0x65, 0x3F, 0x40, 0x6F) . . . . . . . . . . . . . . . . . . . . . . . . . . 94
Headphone/Line out configuration register (address 0x66) . . . . . . . . . . . 96
STCompressorTM configuration register (address 0x6B; 0x6C) . . . . . . . 98
Charge pump synchronization (address 0x70) . . . . . . . . . . . . . . . . . . . . . 98
Coefficient RAM CRC protection (address 0x71-0x7D) . . . . . . . . . . . . . . 99
Configuration register A (addr 0x00) . . . . . . . . . . . . . . . . . . . . . . . . . . . 106
7.1.1
7.1.2
7.1.3
Configuration register B (addr 0x01) . . . . . . . . . . . . . . . . . . . . . . . . . . . 108
7.2.1
7.2.2
7.2.3
7.2.4
7.2.5
Configuration register C (addr 0x02) . . . . . . . . . . . . . . . . . . . . . . . . . . . 112
7.3.1
Configuration register D (addr 0x03) . . . . . . . . . . . . . . . . . . . . . . . . . . . 112
7.4.1
Rate power-down enable (RPDNEN) bit . . . . . . . . . . . . . . . . . . . . . . . . 91
Bridge immediately off (BRIDGOFF) bit (address 0x4B, bit D5) . . . . . . 91
Channel PWM enable (CPWMEN) bit . . . . . . . . . . . . . . . . . . . . . . . . . . 92
External amplifier hardware pin enabler (LPDP, LPD LPDE) bits . . . . . 92
Power-down delay selector (PNDLSL[2:0]) bits . . . . . . . . . . . . . . . . . . . 92
Short-circuit check enable bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
Master clock select . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106
Interpolation ratio select . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107
Fault-detect recovery bypass . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107
Serial data interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108
Serial audio input interface format . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108
Serial data first bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108
Delay serial clock enable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111
Channel input mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111
FFX compensating pulse size register . . . . . . . . . . . . . . . . . . . . . . . . . 112
DSP bypass . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112
Doc ID 018937 Rev 6
STA381BWS