C8051F962-A-GM Silicon Labs, C8051F962-A-GM Datasheet - Page 366

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C8051F962-A-GM

Manufacturer Part Number
C8051F962-A-GM
Description
8-bit Microcontrollers - MCU 128KB, DC-DC, AES DQFN76
Manufacturer
Silicon Labs
Datasheet

Specifications of C8051F962-A-GM

Rohs
yes
Core
8051
Processor Series
C8051
Data Bus Width
8 bit
Maximum Clock Frequency
25 MHz
Program Memory Size
128 KB
Data Ram Size
8448 B
On-chip Adc
Yes
Operating Supply Voltage
2.5 V to 3.3 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
DQFN-76
Mounting Style
SMD/SMT
Number Of Programmable I/os
57
Number Of Timers
4
C8051F96x
SFR Definition 27.12. P0DRV: Port0 Drive Strength
SFR Page = 0xF; SFR Address = 0xA4
SFR Definition 27.13. P1: Port1
SFR Page = All Pages; SFR Address = 0x90; Bit-Addressable
366
Name
Reset
Name
Reset
7:0
Type
Bit
Type
Bit
Bit
Bit
7:0
P0DRV[7:0]
Name
P1[7:0]
Name
7
0
7
1
Drive Strength Configuration Bits for
Configures digital I/O Port cells to high or low output drive strength.
0: Corresponding P0.n Output has low output drive strength.
1: Corresponding P0.n Output has high output drive strength.
Port 1 Data.
Sets the Port latch logic
value or reads the Port pin
logic state in Port cells con-
figured for digital I/O.
6
0
6
1
Description
5
0
5
1
Rev. 0.5
4
0
4
1
0: Set output latch to logic
LOW.
1: Set output latch to logic
HIGH.
P0DRV[7:0]
P1[7:0]
R/W
R/W
P0.7–P0.0 (respectively).
Function
Write
3
0
3
1
2
0
2
1
0: P1.n Port pin is logic
LOW.
1: P1.n Port pin is logic
HIGH.
1
0
1
1
Read
0
0
0
1

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