C8051F962-A-GM Silicon Labs, C8051F962-A-GM Datasheet - Page 112

• Manufacturer Part Number: C8051F962-A-GM
• Description: 8-bit Microcontrollers - MCU 128KB, DC-DC, AES DQFN76
• Manufacturer: Silicon Labs

Specifications of C8051F962-A-GM

• Rohs: yes
• Core: 8051
• Processor Series: C8051
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 25 MHz
• Program Memory Size: 128 KB
• Data Ram Size: 8448 B
• On-chip Adc: Yes
• Operating Supply Voltage: 2.5 V to 3.3 V
• Operating Temperature Range: - 40 C to + 85 C
• Package / Case: DQFN-76
• Mounting Style: SMD/SMT
• Number Of Programmable I/os: 57
• Number Of Timers: 4

C8051F96x
7.6. Comparator0 and Comparator1 Analog Multiplexers
Comparator0 and Comparator1 on C8051F96x devices have analog input multiplexers to connect Port I/O
pins and internal signals the comparator inputs; CP0+/CP0- are the positive and negative input multiplex-
ers for Comparator0 and CP1+/CP1- are the positive and negative input multiplexers for Comparator1.
The comparator input multiplexers directly support capacitive sensors. When the Compare input is
selected on the positive or negative multiplexer, any Port I/O pin connected to the other multiplexer can be
directly connected to a capacitive sensor with no additional external components. The Compare signal pro-
vides the appropriate reference level for detecting when the capacitive sensor has charged or discharged
through the on-chip Rsense resistor. The Comparator0 output can be routed to Timer2 for capturing the
capacitor’s charge and discharge time. See Section “32. Timers” on page 444 for details.
Any of the following may be selected as comparator inputs: Port I/O pins, Capacitive Touch Sense Com-
pare, VDD/DC+ Supply Voltage, Regulated Digital Supply Voltage (Output of VREG0), the VBAT Supply
voltage or ground. The Comparator’s supply voltage divided by 2 is also available as an input; the resistors
used to divide the voltage only draw current when this setting is selected. The Comparator input multiplex-
ers are configured using the CPT0MX and CPT1MX registers described in SFR Definition 7.5 and SFR
Definition 7.6.
Important Note About Comparator Input Configuration: Port pins selected as comparator inputs should
be configured as analog inputs, and should be skipped by the Digital Crossbar. To configure a Port pin for
analog input, set to 0 the corresponding bit in register PnMDIN and disable the digital driver (PnMDOUT =
0 and Port Latch = 1). To force the Crossbar to skip a Port pin, set to 1 the corresponding bit in register
PnSKIP. See Section “27. Port Input/Output” on page 351 for more Port I/O configuration details.
112
VBAT
VBAT
R
R
R
R
CPnOUT
(1/3 or 2/3) x VBAT
R
P0.1
P0.3
P0.5
P1.5
P1.7
P2.1
P2.3
VBAT
VDC
Compare
½ x VBAT
Figure 7.4. CPn Multiplexer Block Diagram
CPn-
Input
MUX
CPnOUT
Rsense
Only enabled when
Compare is selected
on CPn+ Input MUX.
VBAT
VBAT
Rev. 0.5
R
R
R
R
CPnOUT
Digital Supply
(1/3 or 2/3) x VBAT
R
P0.0
P0.2
P0.4
P0.6
P1.4
P1.6
P2.0
P2.2
Compare
GND
½ x VBAT
CPTnMX
CPn+
Input
MUX
CPnOUT
Rsense
Only enabled
when Compare is
selected on CPn-
Input MUX.
+
-
VBAT
GND