C8051F962-A-GM Silicon Labs, C8051F962-A-GM Datasheet - Page 204

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C8051F962-A-GM

Manufacturer Part Number
C8051F962-A-GM
Description
8-bit Microcontrollers - MCU 128KB, DC-DC, AES DQFN76
Manufacturer
Silicon Labs
Datasheet

Specifications of C8051F962-A-GM

Rohs
yes
Core
8051
Processor Series
C8051
Data Bus Width
8 bit
Maximum Clock Frequency
25 MHz
Program Memory Size
128 KB
Data Ram Size
8448 B
On-chip Adc
Yes
Operating Supply Voltage
2.5 V to 3.3 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
DQFN-76
Mounting Style
SMD/SMT
Number Of Programmable I/os
57
Number Of Timers
4
C8051F96x
SFR Definition 14.3. AES0BIN: AES Block Input
SFR Address = 0xEB; SFR page = 0x2; Not bit-Addressable
204
Name
Reset
7:0 AES0BIN[7:0] AES Block Input.
Bit
Type
Bit
Name
R/W
7
0
During an encryption operation, the plaintext is written to the AES0BIN sfr. During
an decryption operation, the ciphertext is written to the AES0BIN sfr. During a key
inversion the encryption key is written to AES0BIN.
When used with the DMA, the DMA will write directly to this sfr.
The AES0BIN may be used in conjunction with the AES0XIN sfr for some cipher
block modes.
When used without the DMA, AES0BIN, AES0XIN, and AES0KIN must be written
in sequence.
Reading this register will yield the last value written. This can be used for debug
purposes.
R/W
6
0
R/W
5
0
R/W
Rev. 0.5
AES0BIN[7:0]
4
0
Function
R/W
3
0
R/W
2
0
R/W
1
0
R/W
0
0

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