C8051F962-A-GM Silicon Labs, C8051F962-A-GM Datasheet - Page 203

no-image

C8051F962-A-GM

Manufacturer Part Number
C8051F962-A-GM
Description
8-bit Microcontrollers - MCU 128KB, DC-DC, AES DQFN76
Manufacturer
Silicon Labs
Datasheet

Specifications of C8051F962-A-GM

Rohs
yes
Core
8051
Processor Series
C8051
Data Bus Width
8 bit
Maximum Clock Frequency
25 MHz
Program Memory Size
128 KB
Data Ram Size
8448 B
On-chip Adc
Yes
Operating Supply Voltage
2.5 V to 3.3 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
DQFN-76
Mounting Style
SMD/SMT
Number Of Programmable I/os
57
Number Of Timers
4
SFR Definition 14.2. AES0DCFG: AES Data Configuration
SFR Address = 0xEA; SFR page = 0x2; Not bit-Addressable
Name
Reset
Bit
2:0
Type
1
Bit
OUTSEL[1:0]
XORIN
Name
R
7
0
DATA Select.
These bits select the output data source for the AES0YOUT sfr.
00: Direct AES Data
01: AES Data XOR with AES0XIN
10: Inverse Key
11: reserved
XOR Input Enable.
Setting this bit with enable the XOR data path on the AES input. If enabled,
AES0BIN will be XORed with the AES0XIN and the results will feed into the AES
data input. Clearing this bit to 0 will disable the XOR gate on the input. The con-
tents of AES0BIN will go directly into the AES data input.
R
6
0
DONE
R/W
5
0
BUSY
Rev. 0.5
R
4
0
Function
R/W
EN
3
0
R/W
2
OUTSEL[1:0]
0
C8051F96x
1
0
R/W
XORIN
0
0
203

Related parts for C8051F962-A-GM