MC68000 MOTOROLA [Motorola, Inc], MC68000 Datasheet - Page 26

• Manufacturer Part Number: MC68000
• Manufacturer: MOTOROLA [Motorola, Inc]

General Description
1.3 MC68302 SYSTEM ARCHITECTURE
Most general-purpose microprocessor-based systems use an architecture that interfaces all
peripheral devices directly onto a single microprocessor bus (see Figure 1-2).
The MC68302 microprocessor architecture is shown in Figure 1-3. In this architecture, the
peripheral devices are isolated from the system bus through a dual-port memory. Various
parameters and counters and all memory buffer descriptor tables reside in the dual-port
RAM. The receive and transmit data buffers may be located in the on-chip RAM or in the off-
chip system RAM. Six DMA channels are dedicated to the six serial ports (receive and trans-
mit for each of the three SCC channels). If data for an SCC channel is programmed to be
located in the external RAM, the CP will program the corresponding DMA channel for the
required accesses, bypassing the dual-port RAM. If data resides in the dual-port RAM, then
the CP accesses the RAM with one clock cycle and no arbitration delays.
1-4
—SCP for Synchronous Communication
—Two Serial Management Controllers (SMCs) To Support IDL and GCI Auxiliary
Channels
SYSTEM BUS
Nonmultiplexed Serial Interface (NMSI) Implementing Standard Modem Signals
Figure 1-2. General-Purpose Microprocessor System Design
DMA
CPU
MC68302 USER’S MANUAL
CHANNELS
DMA AND/
OR FIFOs
SERIAL
ROM
TIMERS
CPU I/F
RAM
ADDITIONAL
DEVICES
MOTOROLA