MC68000 MOTOROLA [Motorola, Inc], MC68000 Datasheet - Page 106

• Manufacturer Part Number: MC68000
• Manufacturer: MOTOROLA [Motorola, Inc]

System Integration Block (SIB)
3.8.5 Bus Arbitration Logic
Both internal and external bus arbitration are discussed in the following paragraphs.
3.8.5.1 Internal Bus Arbitration
The IMP bus arbiter supports three bus request sources in the following standard priority:
When one of these sources desires the bus, the M68000 core will be forced off through an
internal bus request signal (CBR) from the bus arbiter to the M68000 core (see Figure 3-12).
When the arbiter detects the assertion of the M68000 core bus grant (CBG) signal, it asserts
the requester's bus grant signal according to its priority. Thus, as seen externally, the SDMA
and IDMA channels do not affect BR and BG, but only BGACK (unless disable CPU mode
is used).
The MC68302 provides several options for changing the preceding bus master priority list.
The options are configured by setting the BCLM bit in the SCR and deciding whether or not
the BCLR pin is used externally to cause external bus masters to relinquish the bus (see
Table 3-10).
3-56
1. External bus master (BR pin)
2. SDMA for the SCCs (six channels)
3. IDMA (one channel)
questing the M68000 bus with BR. See 3.8.6 Hardware
Watchdog for further details.
MC68302 USER’S MANUAL
MOTOROLA