MC68000 MOTOROLA [Motorola, Inc], MC68000 Datasheet - Page 145

• Manufacturer Part Number: MC68000
• Manufacturer: MOTOROLA [Motorola, Inc]

Each SCON is a 16-bit, memory-mapped, read-write register. The SCONs are set to $0004
by reset, resulting in the baud rate generator output clock rate being set to the main clock
rate divided by 3. The baud rate generator output clock is always available externally, as
shown in Table 5-8.
WOMS—Wired-OR
EXTC—External Clock
TCS—Transmit Clock Source
RCS—Receive Clock Source
MOTOROLA
WOMS
When WOMS is set, the TXD driver is programmed to function as an open-drain output
and may be externally wired together with other TXD pins in an appropriate bus configu-
ration. In this case, an external pullup resistor is required. When WOMS is cleared, the
TXD pin operates normally with an active internal pullup.
The EXTC bit selects whether the baud rate generator input clock source is the internal
main clock (EXTC = 0) or external clock (EXTC = 1). If EXTC = 1, the external clock is
taken from the TIN1 pin. Note that the single TIN1 pin can be used to supply a clock for
all three baud rate generators.
The TCS bit selects either the baud rate generator output (TCS = 0) or the TCLK pin (TCS
= 1) for the transmitter clock. If TCS = 0, then the baud rate generator output is driven onto
the TCLK pin. This bit should be programmed to one if a multiplexed mode is chosen for
the SCC.
After system reset, SCC hardware causes TCLK to default to an input and stay an input
until a zero is written to TCS. For SCC2 and SCC3, TCLK can be derived directly from the
RCLK pin as shown in Table 3-6.
The RCS bit selects either the baud rate generator output (RCS = 0) or the RCLK pin
(RCS = 1) for the receiver clock. If RCS = 0, then the baud rate generator output is driven
onto the RCLK pin. This bit should be programmed to one if a multiplexed mode is chosen
for the SCC.
After system reset, SCC hardware causes the RCLK to default to an input and stay an
input until a zero is written to RCS.
15
EXTC
14
TCS
The BRG output are 180 degrees out of phase to the TCLK and
RCLK signals used by the SCC and output on the RCLK and
TCLK pins.
13
RCS
12
CD10
11
This bit is valid only in NMSI mode.
CD9
10
MC68302 USER’S MANUAL
CD8
9
CD7
NOTE
NOTE
8
CD6
7
CD5
6
CD4
5
Communications Processor (CP)
CD3
4
CD2
3
CD1
2
CD0
1
DIV4
4-25
0