PNX1301 PHILIPS [NXP Semiconductors], PNX1301 Datasheet - Page 478

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PNX1301

Manufacturer Part Number
PNX1301
Description
Media Processors
Manufacturer
PHILIPS [NXP Semiconductors]
Datasheet

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Philips Semiconductors
IEEE status flags from convert unsigned integer
to floating-point
SYNTAX
FUNCTION
DESCRIPTION
integer in rsrc1 to a single-precision IEEE floating-point value, and an integer bit vector representing the computed
exception flags is written into rdest. The bit vector stored in rdest has the same format as the IEEE exception bits in
the PCSW. The exception flags in PCSW are left unchanged by this operation. Rounding is according to the IEEE
rounding mode bits in PCSW.
the modification of the destination register. If the LSB of rguard is 1, rdest is written; otherwise, rdest is not changed.
EXAMPLES
r30 = 3
r40 = 0xffffffff (4294967295)
r10 = 0, r50 = 0xfffffffd
r20 = 1, r50 = 0xfffffffd
r60 = 0x7fffffff (2147483647)
r70 = 0x80000000 (2147483648)
r80 = 0x7ffffff1 (2147483633)
The
The
[ IF rguard ] ufloatflags rsrc1
if rguard then
rdest
ufloatflags
ufloatflags
31
0
Initial Values
ieee_flags((float) ((unsigned long)rsrc1))
operation optionally takes a guard, specified in rguard. If a guard is present, its LSB controls
operation computes the IEEE exceptions that would result from converting the unsigned
ufloatflags r30
ufloatflags r40
IF r10 ufloatflags r50
IF r20 ufloatflags r50
ufloatflags r60
ufloatflags r70
ufloatflags r80
rdest
Operation
PRELIMINARY SPECIFICATION
7
0
r100
r105
r117
r120
r122
OFZ
6
PNX1300/01/02/11 DSPCPU Operations
r115
r110
IFZ
5
INV
r100
r105
no change, since guard is false
r115
r117
r120
r122
4
Function unit
Operation code
Number of operands
Modifier
Modifier range
Latency
Issue slots
OVF
0
0x02 (INX)
0x02 (INX)
0x02 (INX)
0
0x02 (INX)
3
ufloat ifloatflags
ifloatrzflags
ufloatrzflags
UNF
ATTRIBUTES
2
SEE ALSO
ufloatflags
Result
INX
1
DBZ
0
128
1, 4
falu
No
1
3
A-180

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