PNX1301 PHILIPS [NXP Semiconductors], PNX1301 Datasheet - Page 385

• Manufacturer Part Number: PNX1301
• Description: Media Processors
• Manufacturer: PHILIPS [NXP Semiconductors]

PNX1300/01/02/11 Data Book
ifixieee
SYNTAX
FUNCTION
DESCRIPTION
writes the result into rdest. Rounding is according to the IEEE rounding mode bits in PCSW. If r src1 is denormalized,
zero is substituted before conversion, and the IFZ flag in the PCSW is set. If
such as overflow or underflow, the corresponding exception flags in the PCSW are set. The PCSW exception flags are
sticky: the flags can be set as a side-effect of any floating-point operation but can only be reset by an explicit
writepcsw
other floating-point compute operations update the PCSW at the same time, the net result in each exception flag is the
logical OR of all simultaneous updates ORed with the existing PCSW value for that exception flag.
modification of the destination register. If the LSB of r guard is 1, rdest and the exception flags in PCSW are written;
otherwise, rdest is not changed and the operation does not affect the exception flags in PCSW.
EXAMPLES
A-87
r30 = 0x40400000 (3.0)
r35 = 0x40247ae1 (2.57)
r10 = 0,
r40 = 0xff4fffff (–3.402823466e+38)
r20 = 1,
r40 = 0xff4fffff (–3.402823466e+38)
r45 = 0x7f800000 (+INF))
r50 = 0xbfc147ae (-1.51)
r60 = 0x00400000 (5.877471754e-39)
r70 = 0xffffffff (QNaN)
r80 = 0xffbfffff (SNaN)
The
The
The
[ IF rguard ] ifixieee rsrc1
if rguard then {
}
rdest
ifixieeeflags
ifixieee
ifixieee
(long) ((float)rsrc1)
Initial Values
operation. The update of the PCSW exception flags occurs at the same time as r dest is written. If any
operation converts the single-precision IEEE floating-point value in rsrc1 to a signed integer and
operation optionally takes a guard, specified in rguard. If a guard is present, its LSB controls the
PRELIMINARY SPECIFICATION
operation computes the exception flags that would result from an individual
ifixieee r30
ifixieee r35
IF r10 ifixieee r40
IF r20 ifixieee r40
ifixieee r45
ifixieee r50
ifixieee r60
ifixieee r70
ifixieee r80
Convert floating-point to integer using PCSW
rdest
Operation
r100
r102
r112
r115
r117
r120
r122
r105
r110
ifixieee
r100
r102
no change, since guard is false
r110
r112
r115
r117
r120
r122
Function unit
Operation code
Number of operands
Modifier
Modifier range
Latency
Issue slots
3
3, INX flag set
0x80000000 (-2
0x7fffffff (2
-2, INX flag set
0, IFZ set
0, INV flag set
0, INV flag set
ufixieee ifixrz ufixrz
Philips Semiconductors
causes an IEEE exception,
ATTRIBUTES
rounding mode
SEE ALSO
31
Result
-1), INV flag set
31
), INV flag set
ifixieee
falu
121
1, 4
No
—
1
3
.