PNX1301 PHILIPS [NXP Semiconductors], PNX1301 Datasheet - Page 306

• Manufacturer Part Number: PNX1301
• Description: Media Processors
• Manufacturer: PHILIPS [NXP Semiconductors]

Philips Semiconductors
Arithmetic shift left
SYNTAX
FUNCTION
DESCRIPTION
and rdest is set to rsrc1 arithmetically shifted left by this amount. If the rsrc2<31:5> value is not zero, then take this as
a shift by 32 or more bits. Zeros are shifted into the LSBs of rdest while the MSBs shifted out of r s rc1 are lost.
modification of the destination register. If the LSB of rguard is 1, rdest is written; otherwise, rdest is unchanged.
EXAMPLES
r60 = 0x20, r30 = 3
r10 = 0, r60 = 0x20, r30 = 3
r20 = 1, r60 = 0x20, r30 = 3
r70 = 0xfffffffc, r40 = 2
r80 = 0xe, r50 = 0xfffffffe
r30 = 0x7008000f, r60 = 0x20
r30 = 0x8008000f, r45 = 0x80000000
r30 = 0x8008000f, r45 = 0x23
As shown below, the
The
[ IF rguard ] asl rsrc1 rsrc2
if rguard then {
}
rsrc1
n
rdest<31:n>
rdest<n–1:0>
if rsrc2<31:5> != 0 {
}
31
rdest <- 0
asl
rsrc2<4:0>
Initial Values
operation optionally takes a guard, specified in rguard. If a guard is present, its LSB controls the
Intermediate result
rsrc1<31–n:0>
0
(example: n = 3)
asl
operation takes two arguments, rsrc1 and rsrc2. Rsrc2 specify an unsigned shift amount,
rdest
asl r60 r30
IF r10 asl r60 r30
IF r20 asl r60 r30
asl r70 r40
asl r80 r50
asl r30 r60
asl r30 r45
asl r30 r45
31
rdest
32 bits from rsrc1
Operation
0
r90
r120
r125
r111
r100
r100
Left shifter
PRELIMINARY SPECIFICATION
rsrc2
r100
r110
31
PNX1300/01/02/11 DSPCPU Operations
r90
no change, since guard is false
r110
r120
r125
r111
r100
r100
3
0
0
0x100
0
0
0x100
0xfffffff0
0x00000000 (shift by more than 32)
0x00000000
0x00000000
0x00000000
0
0
0
asli asr asri lsl lsli lsr
Function unit
Operation code
Number of operands
Modifier
Modifier range
Latency
Issue slots
lsri rol roli
Result
ATTRIBUTES
SEE ALSO
rsrc2
shifter
1, 2
No
19
—
0
2
1
asl
A-8