PNX1301 PHILIPS [NXP Semiconductors], PNX1301 Datasheet - Page 452
PNX1301
Manufacturer Part Number
PNX1301
Description
Media Processors
Manufacturer
PHILIPS [NXP Semiconductors]
Datasheet
1.PNX1301.pdf
(548 pages)
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Read data cache address tag
SYNTAX
FUNCTION
DESCRIPTION
destination register rdest. The target block in the data cache is determined by bits 13..6 of the result of rsrc1 + d. Bits
10..6 of rsrc1 + d select the cache set and 13..11 of rsrc1 + d select the element within that set. The d value is an
opcode modifier, must be in the range –256 to 252 inclusive, and must be a multiple of 4.
address tag information stored in the cache port that corresponds to the operation slot in which the
is issued.
modification of the destination register. If the LSB of rguard is 1, rdest is written; otherwise, rdest is not changed.
EXAMPLES
r10 = 0
r20 = 1
The
rdtag
rdtag
The dual-ported data cache uses two separate copies of tag and status information. A
The
[ IF rguard ] rdtag(d) rsrc1
if rguard then {
}
block_addr
rdest<21:0>
rdest<31:22>
rdtag
rdtag
/* block_addr<13:11> selects element, block_addr<10:6> selects set */
writes the address tag for the selected block in bits 2 1..0 of rdest. All other bits of rdest are set to zero.
requires no stall cycles to complete.
Initial Values
operation reads the address tag associated with a block in the data cache and writes these bits into the
operation optionally takes a guard, specified in rguard. If a guard is present, its LSB controls the
rsrc1 + d
dcache_tag_block(block_addr)
0
rdtag(0) r30
IF r10 rdtag(4) r40
IF r20 rdtag(8) r50
rdest
Operation
r60
PRELIMINARY SPECIFICATION
r70
PNX1300/01/02/11 DSPCPU Operations
r80
Function unit
Operation code
Number of operands
Modifier
Modifier range
Latency
Issue slots
no change, since guard is false
rdtag
ATTRIBUTES
SEE ALSO
rdstatus
operation returns the
Result
rdtag
–256..252 by 4
dmemspec
rdtag
7 bits
operation
202
1
3
5
A-154
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